Patents by Inventor Yogendra Yadav
Yogendra Yadav has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967645Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a field plate, a gate electrode, and a first dielectric layer. The substrate has a top surface. The substrate includes a first drift region with a first conductivity type extending from the top surface of the substrate into the substrate, and includes a second drill region with the first conductivity type extending from the top surface of the substrate into the substrate and adjacent to the first drift region. The field plate is over the substrate. The gate electrode has a first portion and a second portion, wherein the first portion of the gate electrode is located over the field plate. The first dielectric layer is between the substrate and the field plate. The first portion of the gate electrode is overlapping with a boundary of the first drift region and the second drift region in the substrate.Type: GrantFiled: July 30, 2021Date of Patent: April 23, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
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Publication number: 20210359129Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a field plate, a gate electrode, and a first dielectric layer. The substrate has a top surface. The substrate includes a first drift region with a first conductivity type extending from the top surface of the substrate into the substrate, and includes a second drill region with the first conductivity type extending from the top surface of the substrate into the substrate and adjacent to the first drift region. The field plate is over the substrate. The gate electrode has a first portion and a second portion, wherein the first portion of the gate electrode is located over the field plate. The first dielectric layer is between the substrate and the field plate. The first portion of the gate electrode is overlapping with a boundary of the first drift region and the second drift region in the substrate.Type: ApplicationFiled: July 30, 2021Publication date: November 18, 2021Inventors: YOGENDRA YADAV, CHI-CHIH CHEN, RUEY-HSIN LIU, CHIH-WEN YAO
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Patent number: 11088277Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.Type: GrantFiled: May 19, 2020Date of Patent: August 10, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
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Publication number: 20200279948Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.Type: ApplicationFiled: May 19, 2020Publication date: September 3, 2020Inventors: YOGENDRA YADAV, CHI-CHIH CHEN, RUEY-HSIN LIU, CHIH-WEN YAO
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Patent number: 10672904Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.Type: GrantFiled: April 19, 2019Date of Patent: June 2, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
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Publication number: 20190252545Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.Type: ApplicationFiled: April 19, 2019Publication date: August 15, 2019Inventors: YOGENDRA YADAV, CHI-CHIH CHEN, RUEY-HSIN LIU, CHIH-WEN YAO
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Patent number: 10269954Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.Type: GrantFiled: January 5, 2018Date of Patent: April 23, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
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Publication number: 20180130904Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device comprises a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.Type: ApplicationFiled: January 5, 2018Publication date: May 10, 2018Inventors: YOGENDRA YADAV, CHI-CHIH CHEN, RUEY-HSIN LIU, CHIH-WEN YAO
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Patent number: 9871134Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device includes a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.Type: GrantFiled: December 21, 2015Date of Patent: January 16, 2018Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yogendra Yadav, Chi-Chih Chen, Ruey-Hsin Liu, Chih-Wen Yao
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Publication number: 20170179280Abstract: A semiconductor device and the method of manufacturing the same are provided. The semiconductor device includes a substrate, a source region, a drain region, a filed plate and a gate electrode. The source region is of a first conductivity type located at a first side within the substrate. The drain region is of the first conductive type located at a second side within the substrate opposite to the first side. The field plate is located over the substrate and between the source region and the drain region. A portion of the gate electrode is located over the field plate.Type: ApplicationFiled: December 21, 2015Publication date: June 22, 2017Inventors: YOGENDRA YADAV, CHI-CHIH CHEN, RUEY-HSIN LIU, CHIH-WEN YAO
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Patent number: 8324705Abstract: An integrated circuit structure includes a semiconductor substrate; a first well region of a first conductivity type over the semiconductor substrate; a second well region of a second conductivity type opposite the first conductivity type encircling the first well region; and a metal-containing layer over and adjoining the first well region and extending over at least an inner portion of the second well region. The metal-containing layer and the first well region form a Schottky barrier. The integrated circuit structure further includes an isolation region encircling the metal-containing layer; and a third well region of the second conductivity type encircling at least a central portion of the first well region. The third well region has a higher impurity concentration than the second well region, and includes a top surface adjoining the metal-containing layer, and a bottom surface higher than bottom surfaces of the first and the second well regions.Type: GrantFiled: May 27, 2008Date of Patent: December 4, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Shao Tang, Dah-Chuen Ho, Yu-Chang Jong, Zhe-Yi Wang, Yuh-Hwa Chang, Yogendra Yadav
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Publication number: 20090294865Abstract: An integrated circuit structure includes a semiconductor substrate; a first well region of a first conductivity type over the semiconductor substrate; a second well region of a second conductivity type opposite the first conductivity type encircling the first well region; and a metal-containing layer over and adjoining the first well region and extending over at least an inner portion of the second well region. The metal-containing layer and the first well region form a Schottky barrier. The integrated circuit structure further includes an isolation region encircling the metal-containing layer; and a third well region of the second conductivity type encircling at least a central portion of the first well region. The third well region has a higher impurity concentration than the second well region, and includes a top surface adjoining the metal-containing layer, and a bottom surface higher than bottom surfaces of the first and the second well regions.Type: ApplicationFiled: May 27, 2008Publication date: December 3, 2009Inventors: Chien-Shao Tang, Dah-Chuen Ho, Yu-Chang Jong, Zhe-Yi Wang, Yuh-Hwa Chang, Yogendra Yadav