Abstract: A method comprises: forming a first metallization layer on a semiconductor die, the first metallization layer including a metal fuse; and forming a second metallization layer on the first metallization layer, in which the second metallization layer includes a thermal conductor spaced from the metal fuse, and the first metallization layer is between the second metallization layer and the semiconductor die.

Abstract: An electronic device includes an input, an output, a metal fuse, a resistor, a heat control transistor, and a heat controller. The metal fuse is coupled between the input and the output. The resistor is coupled between the metal fuse and the heat control transistor. The heat control transistor is coupled between the resistor and a reference terminal of the electronic device, and the heat controller is configured to control a heater current of the heat control transistor.

Abstract: An electronic device includes an input, an output, a metal fuse, a resistor, a heat control transistor, and a heat controller. The metal fuse is coupled between the input and the output. The resistor is coupled between the metal fuse and the heat control transistor. The heat control transistor is coupled between the resistor and a reference terminal of the electronic device, and the heat controller is configured to control a heater current of the heat control transistor.

Abstract: A semiconductor package includes a leadframe, a semiconductor die attached to the leadframe, and a passive component electrically connected to the semiconductor die through the leadframe. The leadframe includes a cavity in a side of the leadframe opposite the semiconductor die, and at least a portion of the passive component resides within the cavity in a stacked arrangement.

Abstract: A semiconductor package includes a leadframe, a semiconductor die attached to the leadframe, and a passive component electrically connected to the semiconductor die through the leadframe. The leadframe includes a cavity in a side of the leadframe opposite the semiconductor die, and at least a portion of the passive component resides within the cavity in a stacked arrangement.

Abstract: A semiconductor package includes a leadframe and a semiconductor die attached to the leadframe by way of solder posts. In a stacked arrangement, the package also includes a passive component disposed between the leadframe and the semiconductor die and electrically connected to the semiconductor die through the leadframe.

Abstract: Described herein is a technology for implementing a decoupling circuit (104) to increase reliability of a DC-DC power converter (100). To absorb an overshoot transient voltage, the decoupling circuit includes a first capacitor (214) and a second capacitor (216) that charge energy during a short burst of upward electrical energy. During an undershoot transient voltage, however, the first capacitor and second capacitor discharge energy to a transistor (108). In certain embodiment, such as the transistor that requires higher voltage switching, the decoupling circuit is connected in series with another decoupling circuit.

Abstract: A semiconductor package includes a leadframe and a semiconductor die attached to the leadframe by way of solder posts. In a stacked arrangement, the package also includes a passive component disposed between the leadframe and the semiconductor die and electrically connected to the semiconductor die through the leadframe.

Abstract: A semiconductor package includes a leadframe, a semiconductor die attached to the leadframe, and a passive component electrically connected to the semiconductor die through the leadframe. The leadframe includes a cavity in a side of the leadframe opposite the semiconductor die, and at least a portion of the passive component resides within the cavity in a stacked arrangement.

Abstract: A semiconductor package includes a leadframe, a semiconductor die attached to the leadframe, and a passive component electrically connected to the semiconductor die through the leadframe. The leadframe includes a cavity in which at least a portion of the passive component is disposed in a stacked arrangement.

Abstract: A circuit includes a transformer configured with a primary winding and a secondary winding that are driven from a voltage supplied by a thermoelectric generator (TEG). The circuit includes a bipolar startup stage (BSS) coupled to the transformer to generate an intermediate voltage. The BSS includes a first transistor device coupled in series with the primary winding of the transformer to form an oscillator circuit with an inductance of the secondary winding when the voltage supplied by the TEG is positive. A second transistor device coupled to the secondary winding of the transformer enables the oscillator circuit to oscillate when the voltage supplied by the TEG is negative. After startup, a flyback converter stage can be enabled from the intermediate voltage to generate a boosted regulated output voltage.

Abstract: A hysteretic converter includes an inductor coupled between a source of voltage and a switch node. A low side switch is coupled between the switch node and a reference voltage. A high side switch is coupled between the switch node and the output of the converter. A driver controls the low side and high side switches, wherein the low side switch is turned on until the input current rises to a predetermined set point, the predetermined setpoint can be adapted to input current from the source of voltage.

Abstract: A maximum power point tracking circuit for an energy harvester device, the tracking circuit requiring nanoampere current in a standby mode, includes a maximum power point circuits utilizing a predetermined fraction of the open circuit input voltage to determine the maximum power point for energy harvester device. A circuit determines the predetermined fraction of the open circuit voltage of the energy harvester device.

Abstract: A circuit and method for providing a fully integrated DC-DC converter using on-chip switched capacitors is disclosed. A switched capacitor matrix is coupled as a digitally controlled transfer capacitor. A pair of non-overlapping, fixed frequency clock signals is provided to a switched capacitor circuit including the switched capacitor matrix and a load capacitor coupled to the output terminal. A DC input voltage supply is provided. A hysteretic feedback loop is used to control the voltage at the output as a stepped-down voltage from the input by digitally modulating the transfer capacitor using switches in the switch matrix to couple more, or fewer, transfer capacitors to the output terminal during a clock cycle. A coarse and a fine adjustment circuit are provided to improve the regulation during rapid changes in load power. A method of operating the regulator is disclosed.

Abstract: A circuit and method for providing a fully integrated DC-DC converter using on-chip switched capacitors is disclosed. A switched capacitor matrix is coupled as a digitally controlled transfer capacitor. A pair of non-overlapping, fixed frequency clock signals is provided to a switched capacitor circuit including the switched capacitor matrix and a load capacitor coupled to the output terminal. A DC input voltage supply is provided. A hysteretic feedback loop is used to control the voltage at the output as a stepped-down voltage from the input by digitally modulating the transfer capacitor using switches in the switch matrix to couple more, or fewer, transfer capacitors to the output terminal during a clock cycle. A coarse and a fine adjustment circuit are provided to improve the regulation during rapid changes in load power. A method of operating the regulator is disclosed.