Patents by Inventor Yoh Takamori

Yoh Takamori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5084843
    Abstract: A volatile storage circuit for latching data is disposed outside a non-volatile memory array. Before a bulk erase of the memory array, some of the data items contained therein are transferred to and held by the storage circuit. The data items thus saved are rewritten to the non-volatile memory array after the bulk erase, or alternatively, on the basis of control data items transferred to the storage circuit, only regions designated by these data items are subjected to the bulk erase. Thus, in case of a bulk erase of an EEPROM, some of the stored data items can be preserved, so as to prevent illicit use of and maintain the integrity of the preserved data. Also the testing time of the data rewritten to the memory array is reduced because of the elimination of the need to test the memory area containing the preserved data in that only the integrity of the memory area containing data sourced externally need be tested.
    Type: Grant
    Filed: April 24, 1990
    Date of Patent: January 28, 1992
    Assignee: Hitachi, Ltd.
    Inventors: Naoki Mitsuishi, Kiyoshi Matsubara, Yoh Takamori, Yoshiyuki Ozawa
  • Patent number: 4931997
    Abstract: A volatile storage circuit for latching data is disposed outside a non-volatile memory array. Before a bulk erase of the memory array, some of the data items contained therein are transferred to and held by the storage circuit. The data items thus saved are rewritten to the non-volatile memory array after the bulk erase, or alternatively, on the basis of control data items transferred to the storage circuit, only regions designated by these data items are subjected to the bulk erase. Thus, in case of a bulk erase of an EEPROM, some of the stored data items can be preserved, so as to prevent illicit use of and maintain the integrity of the preserved data. Also the testing time of the data rewritten to the memory array is reduced because of the elimination of the need to test the memory area containing the preserved data in that only the integrity of the memory area containing data sourced externally need be tested.
    Type: Grant
    Filed: February 23, 1988
    Date of Patent: June 5, 1990
    Assignee: Hitachi Ltd.
    Inventors: Naoki Mitsuishi, Kiyoshi Matsubara, Yoh Takamori, Yoshiyuki Ozawa