Patents by Inventor Yoichi Fujisawa

Yoichi Fujisawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9099545
    Abstract: A compound semiconductor device includes a substrate; a compound semiconductor layer formed on the substrate; a first insulating film formed on the compound semiconductor layer; a second insulating film formed on the first insulating film; and a gate electrode, a source electrode, and a drain electrode, each being formed on the compound semiconductor layer, wherein the gate electrode is formed of a first opening filled with a first conductive material via at least a gate insulator, and the first opening is formed in the first insulating film and configured to partially expose the compound semiconductor layer, and wherein the source electrode and the drain electrode are formed of a pair of second openings filled with at least a second conductive material, and the second openings are formed in at least the second insulating film and the first insulating film and configured to partially expose the compound semiconductor layer.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: August 4, 2015
    Assignee: Transphorm Japan, Inc.
    Inventors: Shinichi Akiyama, Kenji Nukui, Mutsumi Katou, Yoshitaka Watanabe, Tetsuya Itou, Yoichi Fujisawa, Toshiya Sato, Tsutomu Hosoda, Yuuichi Satou
  • Publication number: 20140021513
    Abstract: A compound semiconductor device includes a substrate; a compound semiconductor layer formed on the substrate; a first insulating film formed on the compound semiconductor layer; a second insulating film formed on the first insulating film; and a gate electrode, a source electrode, and a drain electrode, each being formed on the compound semiconductor layer, wherein the gate electrode is formed of a first opening filled with a first conductive material via at least a gate insulator, and the first opening is formed in the first insulating film and configured to partially expose the compound semiconductor layer, and wherein the source electrode and the drain electrode are formed of a pair of second openings filled with at least a second conductive material, and the second openings are formed in at least the second insulating film and the first insulating film and configured to partially expose the compound semiconductor layer.
    Type: Application
    Filed: September 23, 2013
    Publication date: January 23, 2014
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Shinichi AKIYAMA, Kenji NUKUI, Mutsumi KATOU, Yoshitaka WATANABE, Tetsuya ITOU, Yoichi FUJISAWA, Toshiya SATO, Tsutomu HOSODA, Yuuichi SATOU
  • Patent number: 8569124
    Abstract: A compound semiconductor device includes a substrate; a compound semiconductor layer formed on the substrate; a first insulating film formed on the compound semiconductor layer; a second insulating film formed on the first insulating film; and a gate electrode, a source electrode, and a drain electrode, each being formed on the compound semiconductor layer, wherein the gate electrode is formed of a first opening filled with a first conductive material via at least a gate insulator, and the first opening is formed in the first insulating film and configured to partially expose the compound semiconductor layer, and wherein the source electrode and the drain electrode are formed of a pair of second openings filled with at least a second conductive material, and the second openings are formed in at least the second insulating film and the first insulating film and configured to partially expose the compound semiconductor layer.
    Type: Grant
    Filed: April 19, 2011
    Date of Patent: October 29, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shinichi Akiyama, Kenji Nukui, Mutsumi Katou, Yoshitaka Watanabe, Tetsuya Itou, Yoichi Fujisawa, Toshiya Sato, Tsutomu Hosoda, Yuuichi Satou
  • Publication number: 20110272742
    Abstract: A compound semiconductor device includes a substrate; a compound semiconductor layer formed on the substrate; a first insulating film formed on the compound semiconductor layer; a second insulating film formed on the first insulating film; and a gate electrode, a source electrode, and a drain electrode, each being formed on the compound semiconductor layer, wherein the gate electrode is formed of a first opening filled with a first conductive material via at least a gate insulator, and the first opening is formed in the first insulating film and configured to partially expose the compound semiconductor layer, and wherein the source electrode and the drain electrode are formed of a pair of second openings filled with at least a second conductive material, and the second openings are formed in at least the second insulating film and the first insulating film and configured to partially expose the compound semiconductor layer.
    Type: Application
    Filed: April 19, 2011
    Publication date: November 10, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Shinichi AKIYAMA, Kenji Nukui, Mutsumi Katou, Yoshitaka Watanabe, Tetsuya Itou, Yoichi Fujisawa, Toshiya Sato, Tsutomu Hosoda, Yuuichi Satou
  • Patent number: 6187600
    Abstract: A surface layer portion of a silicon substrate is etched by using a mixed solution which contains ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2) and water (H2O) at a weight ratio of 1:(1.3 to 2.65):(275 to 433). The density of the etch pits which have occurred in a surface of the silicon substrate whose surface layer portion was etched by the etching step is measured. The crystal quality, etc. of the silicon substrate are evaluated before a process for manufacturing semiconductor devices using such silicon substrates, in order to avoid a lowering of the yields of the semiconductor devices.
    Type: Grant
    Filed: October 20, 1998
    Date of Patent: February 13, 2001
    Assignee: Fujitsu Limited
    Inventors: Yoichi Fujisawa, Kaoru Ogawa, Kenichi Hikazutani
  • Patent number: 5426073
    Abstract: In wafer processes, after at least one layer which constitutes a structural member of a functional semiconductor element is formed on a semiconductor wafer, a brittle, excessive deposition on an edge of the semiconductor wafer is removed by grinding or etching of the wafer edge until the underlying wafer is exposed. The removal of the excessive deposition on the wafer edge reduces dust generation caused from crack and peel-off of the excessive deposition on the wafer edge, even if the wafer edge contacts a jig, and the like. Thus, the reduction in dust generation improves production yields of highly integrated semiconductor devices.
    Type: Grant
    Filed: October 13, 1993
    Date of Patent: June 20, 1995
    Assignee: Fujitsu Limited
    Inventors: Kazunori Imaoka, Yoichi Fujisawa
  • Patent number: 4662470
    Abstract: An oiler cooler surrounding the head pipe of a motorcycle on three side and is fixed thereto. It is positioned vertically between the top bridge and the bottom bridge and laterally between the pair of left and right front fork pipes which are inserted through the top and bottom bridges. Upon turning, the cooler remains stationary relative to the motorcycle main frame.
    Type: Grant
    Filed: June 14, 1985
    Date of Patent: May 5, 1987
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Yoichi Fujisawa, Hiroaki Hasumi