Patents by Inventor Yoichi Ohshima
Yoichi Ohshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240161997Abstract: A light source that emits pulse excitation light includes a laser light source, an optical splitter that splits a pulse laser beam into a plurality of pulse laser beams, phase adjusters and optical amplifiers provided for the pulse laser beams, and an optical combiner that combines the plurality of pulse laser beams whose phases are adjusted and that are amplified, and outputs combined light as the pulse excitation light. An optical phase controller controls phase delay amounts of the phase adjusters, and an optical monitor detects an inclination of the pulse excitation light relative to an optical axis of a focusing lens. The optical phase controller stores phase delay amount data indicating phase delay amounts of the plurality of phase adjusters in which the inclination is a predetermined value, and sets the phase delay amounts of the plurality of phase adjusters based on the phase delay amount data.Type: ApplicationFiled: April 16, 2021Publication date: May 16, 2024Inventors: Takashi OHSHIMA, Naohiro KOHMU, Hideo MORISHITA, Tatsuro IDE, Yoichi OSE, Junichi KATANE, Toshihide AGEMURA
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Publication number: 20240128049Abstract: An object of the invention is to provide an electron microscope capable of obtaining a sufficient energy resolution without forming a long drift space and capable of attaining high energy discrimination detection performance with approximately the same device size as in the related art. The electron microscope according to the invention includes a pulsed electron emission mechanism configured to emit an electron beam in a pulsed manner, and discriminates energy of signal electrons by discriminating the signal electrons, which are emitted from a sample by irradiating the sample with the electron beam, according to a time of flight (see FIG. 2).Type: ApplicationFiled: August 31, 2021Publication date: April 18, 2024Inventors: Katsura TAKAGUCHI, Takashi OHSHIMA, Hideo MORISHITA, Yoichi OSE, Junichi KATANE, Toshihide AGEMURA, Michio HATANO
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Publication number: 20240120168Abstract: An electron beam emitted from a photoexcited electron gun is increased in luminance. An electron gun 15 includes: a photocathode 1 including a substrate 11 and a photoelectric film 10; a light source 7 that emits pulsed excitation light; a condenser lens 2 that focuses the pulsed excitation light toward the photocathode; and an extractor electrode 3 that faces the photocathode and that accelerates an electron beam generated from the photoelectric film by focusing the pulsed excitation light by the condenser lens, transmitting the pulsed excitation light through the substrate of the photocathode, and causing the pulsed excitation light to be incident on the photocathode. The pulsed excitation light is condensed at different timings at different positions on the photoelectric film of the photocathode.Type: ApplicationFiled: October 31, 2019Publication date: April 11, 2024Applicants: Hitachi High-Tech Corporation, Hitachi High-Tech CorporationInventors: Takashi Ohshima, Hideo Morishita, Tatsuro Ide, Naohiro Kohmu, Momoyo Enyama, Yoichi Ose, Toshihide Agemura, Junichi Katane
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Patent number: 9715381Abstract: An object is to provide an information processing apparatus and the like that can reduce power consumption of the information processing apparatus in downloading and installing. To achieve this object, whether or not there is system software update is confirmed in a low power consumption state in which only some of hardware components of the information processing apparatus are supplied with power and communication with a predetermined server can be performed. When there is the update, update data is downloaded, and at least some of the hardware components that are the update targets and that are not supplied with power in the low power consumption state are started to be supplied with power. Then, system update is executed. The series of processes are automatically executed without a user's operation.Type: GrantFiled: May 5, 2016Date of Patent: July 25, 2017Assignee: NINTENDO CO., LTD.Inventors: Eiji Tokunaga, Yoichi Ohshima, Tsuyoshi Kurita, Shinobu Suzuki, Yu Horii, Shumpei Yasuda, David Tran, Eugene Borisov, Craig MacDonald
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Publication number: 20160246589Abstract: An object is to provide an information processing apparatus and the like that can reduce power consumption of the information processing apparatus in downloading and installing. To achieve this object, whether or not there is system software update is confirmed in a low power consumption state in which only some of hardware components of the information processing apparatus are supplied with power and communication with a predetermined server can be performed. When there is the update, update data is downloaded, and at least some of the hardware components that are the update targets and that are not supplied with power in the low power consumption state are started to be supplied with power. Then, system update is executed. The series of processes are automatically executed without a user's operation.Type: ApplicationFiled: May 5, 2016Publication date: August 25, 2016Inventors: Eiji TOKUNAGA, Yoichi OHSHIMA, Tsuyoshi KURITA, Shinobu SUZUKI, Yu HORII, Shumpei YASUDA, David TRAN, Eugene BORISOV, Craig MACDONALD
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Patent number: 9361091Abstract: An object is to provide an information processing apparatus and the like that can reduce power consumption of the information processing apparatus in downloading and installing. To achieve this object, whether or not there is system software update is confirmed in a low power consumption state in which only some of hardware components of the information processing apparatus are supplied with power and communication with a predetermined server can be performed. When there is the update, update data is downloaded, and at least some of the hardware components that are the update targets and that are not supplied with power in the low power consumption state are started to be supplied with power. Then, system update is executed. The series of processes are automatically executed without a user's operation.Type: GrantFiled: May 27, 2014Date of Patent: June 7, 2016Assignee: NINTENDO CO., LTD.Inventors: Eiji Tokunaga, Yoichi Ohshima, Tsuyoshi Kurita, Shinobu Suzuki, Yu Horii, Shumpei Yasuda, David Tran, Eugene Borisov, Craig MacDonald
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Publication number: 20150347117Abstract: An object is to provide an information processing apparatus and the like that can reduce power consumption of the information processing apparatus in downloading and installing. To achieve this object, whether or not there is system software update is confirmed in a low power consumption state in which only some of hardware components of the information processing apparatus are supplied with power and communication with a predetermined server can be performed. When there is the update, update data is downloaded, and at least some of the hardware components that are the update targets and that are not supplied with power in the low power consumption state are started to be supplied with power. Then, system update is executed. The series of processes are automatically executed without a user's operation.Type: ApplicationFiled: May 27, 2014Publication date: December 3, 2015Applicant: NINTENDO CO., LTD.Inventors: Eiji Tokunaga, Yoichi Ohshima, Tsuyoshi Kurita, Shinobu Suzuki, Yu Horii, Shumpei Yasuda, David Tran, Eugene Borisov, Craig MacDonald
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Patent number: 5920528Abstract: An optical disc apparatus for recording and/or reproducing with respect to an optical disc, comprises a light source for emitting a laser beam; an object lens for focusing the laser beam toward the optical disc; a supporting device which supports the object lens; a sled portion which holds this supporting device; a transporting means for moving the sled portion in the radial direction of the optical disc; a center point servo control means for detecting the movement of the object lens and moving the supporting device so that the object lens is maintained at a predetermined position; a tracking servo control means for generating a tracking error signal and moving the supporting device, so that the object lens is held on the desired track of the optical disc; a frequency detecting means for detecting the frequency of the tracking error signal; and a servo control selecting means for selectively selecting the center point servo control means or the tracking servo control means based on the frequency.Type: GrantFiled: June 10, 1997Date of Patent: July 6, 1999Assignee: Sony CorporationInventors: Yoichi Ohshima, Minoru Hashimoto
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Patent number: 5763321Abstract: A method of manufacturing semiconductor devices, includes the step of forming a first conductive region of a first conductive material for effecting a growth of a conductive film thereon by a selective growth method. Also, a second conductive region of a second conductive material for not effecting a growth of a conductive film is formed in the selective growth method. An insulating layer is covered with the first and second conductive regions. Further, a through hole in the insulating layer for filling the hole with the conductive film is formed. The conductive film is grown within the through hole over the first conductive region, thereby filling the through hole with the conductive film.Type: GrantFiled: November 7, 1995Date of Patent: June 9, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Yoichi Ohshima, Hideaki Aochi
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Patent number: 5547884Abstract: Field oxide films are formed on a semiconductor substrate of first conductivity type to be spaced from each other in the stripe shape. Gate insulating films are formed on the semiconductor substrate between the field oxide films. Word lines or control gate electrodes are formed on the field oxide films and the gate insulating films to be spaced from each other in the stripe shape along a direction perpendicular to the field oxide films. Grooves are formed in the gate insulating films and the field oxide films sandwiched by the word lines. Source regions of second conductivity type are formed in the semiconductor substrate in the grooves formed in the gate insulating films. A common source wiring region of second conductivity type for electrically connecting the respective source regions is formed in the semiconductor substrate in the grooves formed in the field oxide films.Type: GrantFiled: November 30, 1994Date of Patent: August 20, 1996Assignee: Kabushiki Kaisha ToshibaInventors: Yoshiko Yamaguchi, Yoichi Ohshima
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Patent number: 5476814Abstract: A method of manufacturing semiconductor devices includes the step of forming a first conductive region of a first conductive material for effecting a growth of a conductive film thereon by a selective growth method. Also, a second conductive region of a second conductive material for not effecting a growth of a conductive film is formed in the selective growth method. An insulating layer is covered with the first and second conductive regions. Further, a through hole in the insulating layer for filling the hole with the conductive film is formed. The conductive film is grown within the through hole over the first conductive region, thereby filling the through hole with the conductive film.Type: GrantFiled: June 29, 1994Date of Patent: December 19, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Yoichi Ohshima, Hideaki Aochi
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Patent number: 5394001Abstract: Field oxide films are formed on a semiconductor substrate of first conductivity type to be spaced from each other in the stripe shape. Gate insulating films are formed on the semiconductor substrate between the field oxide films. Word lines or control gate electrodes are formed on the field oxide films and the gate insulating films to be spaced from each other in the stripe shape along a direction perpendicular to the field oxide films. Grooves are formed in the gate insulating films and the field oxide films in regions sandwiched by the word lines. Source regions of second conductivity type are formed in the semiconductor substrate in the grooves formed in the gate insulating films. A common source wiring region of second conductivity type for electrically connecting the respective source regions is formed in the semiconductor substrate in the grooves formed in the field oxide films.Type: GrantFiled: May 25, 1993Date of Patent: February 28, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Yoshiko Yamaguchi, Yoichi Ohshima
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Patent number: 5365112Abstract: A contact plug formed in a contact hole formed in a boron-containing BPSG insulating film, and a pad bed formed under a bonding pad portion of a wiring are formed of a three-layered polysilicon film, thus reducing the number of fabrication steps. A protective film may be provided on the pad bed. This structure facilitates the formation of the pad bed and protects the pad bed that prevents film shearing at the bonding pad portion, thereby improving the adhesion to the insulating film.Type: GrantFiled: October 13, 1992Date of Patent: November 15, 1994Assignee: Kabushiki Kaisha ToshibaInventor: Yoichi Ohshima
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Patent number: 5194929Abstract: In a semiconductor integrated circuit comprising an array of memory cells of floating gate type MOS transistors, an insulating film is formed on the top surface and the side walls of the gate electrode portion. The insulating films on the side walls serve as an offset region of a channel contacting with the drain region. The side end portions of the drain region, contacting the channel region has a lower impurity concentration than the remaining portion of the drain region. A conductive layer covers the surface of the drain region and at least the insulating films on the side walls of the gate electrode, which upstands above both ends of the drain region. A metal interconnection layer is deposited on the conductive layer.Type: GrantFiled: February 10, 1992Date of Patent: March 16, 1993Assignee: Kabushiki Kaisha ToshibaInventors: Yoichi Ohshima, Masaki Sato
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Patent number: 5019527Abstract: There is formed on a surface of a first conductivity type semiconductor substrate strip shaped first insulator separately extending in parallel with one another. A plurality of stacked gate structures, each comprising a second insulator, a floating gate, a third insulator, a control gate, a fourth insulator and an etching stopper having a slower etching speed than the fourth insulator, are formed on the substrate and the first insulator. Those portions of each first insulator that are located between the parallel extending gate structures and are present at prospective source regions are self-aligningly removed with using one end side of each gate structure as a part of a mask, so as to expose those portions of the substrate that are located at the prospective source regions.Type: GrantFiled: August 9, 1990Date of Patent: May 28, 1991Assignee: Kabushiki Kaisha ToshibaInventors: Yoichi Ohshima, Seiichi Mori