Patents by Inventor Yoichi Ueda

Yoichi Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10515988
    Abstract: The present technology relates to a solid-state image sensing device and an electronic device capable of reducing noises. The solid-state image sensing device includes a photoelectric conversion unit, a charge holding unit for holding charges transferred from the photoelectric conversion unit, a first transfer transistor for transferring charges from the photoelectric conversion unit to the charge holding unit, and a light blocking part including a first light blocking part and a second light blocking part. The first light blocking part is arranged between a second surface opposite to a first surface as a light receiving surface of the photoelectric conversion unit and the charge holding unit, and covers the second surface, and is formed with a first opening, and the second light blocking part surrounds the side surface of the photoelectric conversion unit. The present technology is applicable to solid-state image sensing devices of backside irradiation type.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: December 24, 2019
    Assignee: SONY CORPORATION
    Inventors: Hiroshi Tayanaka, Kentaro Akiyama, Yorito Sakano, Takashi Oinoue, Yoshiya Hagimoto, Yusuke Matsumura, Naoyuki Sato, Yuki Miyanami, Yoichi Ueda, Ryosuke Matsumoto
  • Publication number: 20190341418
    Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.
    Type: Application
    Filed: July 12, 2019
    Publication date: November 7, 2019
    Applicant: Sony Corporation
    Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
  • Patent number: 10367027
    Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: July 30, 2019
    Assignee: Sony Corporation
    Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
  • Publication number: 20190043901
    Abstract: The present technology relates to a solid-state imaging element configured so that pixels can be more reliably separated, a method for manufacturing the solid-state imaging element, and an electronic apparatus. The solid-state imaging element includes a photoelectric converter, a first separator, and a second separator. The photoelectric converter is configured to perform photoelectric conversion of incident light. The first separator configured to separate the photoelectric converter is formed in a first trench formed from a first surface side. The second separator configured to separate the photoelectric converter is formed in a second trench formed from a second surface side facing a first surface. The present technology is applicable to an individual imaging element mounted on, e.g., a camera and configured to acquire an image of an object.
    Type: Application
    Filed: April 11, 2017
    Publication date: February 7, 2019
    Inventors: Hideyuki HONDA, Tetsuya UCHIDA, Toshifumi WAKANO, Yusuke TANAKA, Yoshiharu KUDOH, Hirotoshi NOMURA, Tomoyuki HIRANO, Shinichi YOSHIDA, Yoichi UEDA, Kosuke NAKANISHI
  • Patent number: 9960202
    Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: May 1, 2018
    Assignee: Sony Corporation
    Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
  • Publication number: 20180047776
    Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.
    Type: Application
    Filed: October 5, 2017
    Publication date: February 15, 2018
    Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
  • Publication number: 20180033809
    Abstract: The present technology relates to a solid-state image sensing device and an electronic device capable of reducing noises. The solid-state image sensing device includes: a photoelectric conversion unit; a charge holding unit for holding charges transferred from the photoelectric conversion unit; a first transfer transistor for transferring charges from the photoelectric conversion unit to the charge holding unit; and a light blocking part including a first light blocking part and a second light blocking part, in which the first light blocking part is arranged between a second surface opposite to a first surface as a light receiving surface of the photoelectric conversion unit and the charge holding unit, and covers the second surface, and is formed with a first opening, and the second light blocking part surrounds the side surface of the photoelectric conversion unit. The present technology is applicable to solid-state image sensing devices of backside irradiation type, for example.
    Type: Application
    Filed: February 12, 2016
    Publication date: February 1, 2018
    Inventors: Hiroshi TAYANAKA, Kentaro AKIYAMA, Yorito SAKANO, Takashi OINOUE, Yoshiya HAGIMOTO, Yusuke MATSUMURA, Naoyuki SATO, Yuki MIYANAMI, Yoichi UEDA, Ryosuke MATSUMOTO
  • Publication number: 20170084659
    Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.
    Type: Application
    Filed: December 6, 2016
    Publication date: March 23, 2017
    Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
  • Patent number: 9548326
    Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: January 17, 2017
    Assignee: Sony Corporation
    Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
  • Publication number: 20160126273
    Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.
    Type: Application
    Filed: January 12, 2016
    Publication date: May 5, 2016
    Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
  • Patent number: 9276032
    Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: March 1, 2016
    Assignee: SONY CORPORATION
    Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
  • Publication number: 20150084144
    Abstract: Disclosed is a solid-state imaging device including a plurality of pixels and a plurality of on-chip lenses. The plurality of pixels are arranged in a matrix pattern. Each of the pixels has a photoelectric conversion portion configured to photoelectrically convert light incident from a rear surface side of a semiconductor substrate. The plurality of on-chip lenses are arranged for every other pixel. The on-chip lenses are larger in size than the pixels. Each of color filters at the pixels where the on-chip lenses are present has a cross-sectional shape whose upper side close to the on-chip lens is the same in width as the on-chip lens and whose lower side close to the photoelectric conversion portion is shorter than the upper side.
    Type: Application
    Filed: September 18, 2014
    Publication date: March 26, 2015
    Inventors: Rena Suzuki, Hiroki Tojinbara, Ryoto Yoshita, Yoichi Ueda
  • Publication number: 20100231617
    Abstract: According to a data processing device for correcting an image signal which (i) is made up of plural pieces of pixel data and (ii) is externally supplied to a liquid crystal driving panel, a correction circuit includes an interpolation section for (i) obtaining first pixel data to be corrected and second pixel data which is for use in driving one of the plurality of data signal lines at timing earlier than timing at which the one of the plurality of data signal lines is driven in response to the first pixel data and (ii) correcting the first pixel data in accordance with a relationship between the second pixel data and the first pixel data. This provides a data processing device which can carry out a correction so that, in a case where a previously applied voltage have an effect on the charging states of respective pixels connected to a certain data signal line, such an effect is cancelled.
    Type: Application
    Filed: September 3, 2008
    Publication date: September 16, 2010
    Inventors: Yoichi Ueda, Fumikazu Shimoshikiryoh, Kentarou Irie
  • Patent number: 7211285
    Abstract: In the present application are disclosed a method for enhancing or improving the flavor of foods or drinks in general with the use of a non-volatile thiazolidine compound alone or a non-volatile flavor compound and/or a reaction flavor concurrently with the non-volatile thiazolidine compound, a simple and effective method for improving the flavor of a retort food by suppressing the flavor-deterioration upon heat sterilization or the unpleasant odor at the time of eating, and a simple and effective method for improving the flavor of a soybean-incorporated food product by suppressing the unpleasant, weed-like odor peculiar to soybean.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: May 1, 2007
    Assignee: Ajinomoto Co., Inc.
    Inventors: Hirokazu Kawaguchi, Hidehiko Wakabayashi, Masanori Kohmura, Mika Uda, Yasushi Nishimura, Yoichi Ueda
  • Patent number: 7118775
    Abstract: The present invention relates to a method for producing a cysteine-rich food material by maintaining a food material containing ?-glutamylcysteine at a ratio of at least 1 wt % to the solid content thereof at a temperature ranging from 50 to 120° C. and at a pH ranging from 1 to 7. This process is conducted in the absence of a sugar and in the presence of water. The present invention also relates to a method for producing a cysteine-rich food material by reacting the food material with a ?-glutamyl peptide hydrolase at a pH ranging from 3 to 9 and at a temperature ranging from 15 to 70° C. in the present of water. Further, the present invention relates to a method for producing a flavor-enhancing material for use in food, food products obtained by these processes, and yeast cells or extracts for use in food products.
    Type: Grant
    Filed: December 2, 2002
    Date of Patent: October 10, 2006
    Assignee: Ajinomoto Co., Inc.
    Inventors: Masanori Kohmura, Yasushi Nishimura, Koh-ichiro Sano, Hirokazu Kawaguchi, Gaku Hibino, Reiko Sugimoto, Hiroaki Nishiuchi, Hidehiko Wakabayashi, Yoichi Ueda, Minori Ishiguro, legal representative, Tatsuya Ishiguro, legal representative, Shouji Ishiguro, legal representative, Youhei Ishiguro, legal representative, Kyousuki Ishiguro, deceased
  • Patent number: 7108884
    Abstract: Disclosed in this application are a method for producing a food material containing cysteinylglycine at a high content, which comprises the step of (a) maintaining a starting food material containing glutathione in a ratio of 1% by weight or more based on the solid content at a temperature of 50 to 120° C. and a pH of 1 to 7 in the presence of water, or (b) treating the food material with a ?-glutamylpeptide hydrolase at a temperature of 15 to 70° C. and a pH of 3 to 9 in the presence of water, whereby a food material rich in cysteinylglycine is allowed to result, as well as a method for producing a food flavor (or savor) enhancer, which comprises the steps of (a) adding a sugar to cysteinylglycine or a food material containing cysteinylglycine in a ratio of 0.5% by weight or more based on the solid content, and (b) heating the resulting mixture at a temperature of 70 to 180° C.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: September 19, 2006
    Assignee: Ajinomoto Co., Inc.
    Inventors: Yasushi Nishimura, Yuji Kato, Masanori Kohmura, Yoichi Ueda
  • Patent number: 7087422
    Abstract: The object of the present invention is to provide Koji mold aminopeptidases capable of efficiently hydrolyzing persistent peptides and also genes encoding the aminopeptidases. The present invention provides Aspergillus nidulans aminopeptidase and nucleic acid molecules encoding it. In particular, the present invention provides a protein having an amino acid sequence represented by amino acid Nos. 1 to 519 in SEQ ID NO: 2, or a protein containing the substitution, deletion, insertion, addition or inversion of one or more amino acids in said sequence, and which protein has an activity of catalyzing the reaction for releasing an amino acid at an N-terminal of a peptide, and nucleic acid molecules encoding them.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: August 8, 2006
    Assignee: Ajinomoto Co., Inc.
    Inventors: Kyoko Koibuchi, Daiki Ninomiya, Mari Kojima, Yoichi Ueda, Jun-ichi Maruyama, Katsuhiko Kitamoto
  • Patent number: 7011860
    Abstract: Herein is disclosed a flavor precursor composition comprising as an active ingredient a flavor precursor compound (flavor precursor compound A) in which a volatile flavor compound having a mercapto group in the molecule and a non-volatile compound having a mercapto group in the molecule are bound to form a disulfide structure, or a flavor precursor compound (flavor precursor compound B) which is an organic compound represented by Formula (1) shown below in which R1H is a non-volatile compound and R2H is a volatile compound having in the molecule a furan ring structure (including a structure where part or all of the carbon—carbon double bonds thereof are hydrogenated) or a thiophene ring structure (including a structure where part or all of the carbon—carbon double bonds thereof are hydrogenated), said Formula (1) being: R1—(S)n—R2 ??(1) which composition can preserve, and release, the flavor effectively and can be used in the fields of fragrances and foods.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: March 14, 2006
    Assignee: Ajinomoto Co., Inc.
    Inventors: Hidehiko Wakabayashi, Hirokazu Kawaguchi, Minori Ishiguro, legal representative, Tatsuya Ishiguro, legal representative, Shouji Ishiguro, legal representative, Youhei Ishiguro, legal representative, Yoichi Ueda, Kyousuke Ishiguro, deceased
  • Publication number: 20050020728
    Abstract: The present invention provides a process for preparing a solid pigment composition for pigment ink comprising the steps of (a) dissolving polyvinyl alcohol in water, and dispersing pigments in the resulting solution; (b) adding aldehyde derivatives to the resulting pigment dispersion and allowing the polyvinyl alcohol to react with the aldehyde derivatives to prepare polyvinyl acetal; and (c) drying the acetalated pigment dispersion. The pigment ink resulted from the process, employs water-soluble solvents (for example, alcohol solvent, glycol solvent or other non-toxic solvents), contains sufficient amount of pigments, has low concentration with good pigment dispersion and storage stability, and shows good writing or recording ability with improved color-development.
    Type: Application
    Filed: July 25, 2003
    Publication date: January 27, 2005
    Inventors: Toshiyuki Nagaswa, Yoichi Ueda
  • Patent number: 6845125
    Abstract: An xDSL transceiver comprising a transmission unit for transmitting a DMT-modulated signal through a subscriber line as a transmission path and a receiving unit for receiving the DMT-modulated signal from the subscriber line. The xDSL transceiver further comprises an echo signal suppression unit for suppressing the echo signal from the transmission unit to the receiving unit by matching the phase between the frame of the transmission signal and the frame of the receiving signal.
    Type: Grant
    Filed: November 29, 2000
    Date of Patent: January 18, 2005
    Assignee: Fujitsu Limited
    Inventors: Takashi Sasaki, Masato Hori, Kumiko Maruo, Akira Oshima, Noriyasu Suzuki, Yoichi Ueda