Patents by Inventor Yoko Chiba

Yoko Chiba has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121589
    Abstract: A unit is provided through an application of a disaster condition to a PLMN in 5GS, the unit being for transmitting and/or receiving a notification in a case that a communication service cannot be provided to a UE and for selecting a roaming destination PLMN by the UE. Provided are a procedure to allow the UE to recognize a state of a certain PLMN and transmit and/or receive information for appropriately selecting a PLMN as a moving destination in a case that a disaster condition applies or no longer applies to the certain PLMN, a method of selecting a PLMN based on information received and stored by the UE through a notification from the PLMN or the like, and a communication unit.
    Type: Application
    Filed: January 14, 2022
    Publication date: April 11, 2024
    Inventors: SHUICHIRO CHIBA, YASUO SUGAWARA, YUDAI KAWASAKI, YOKO KUGE
  • Publication number: 20240114587
    Abstract: A User Equipment (UE) includes transmission and reception circuitry, and a controller, wherein while one or more Tsor-cm timers are running, and upon receiving a new Steering of roaming connected mode control information (SOR-CMCI), the controller sets a Tsor-cm timer value for an associated PDU session or service to a timer value in the new SOR-CMCI.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 4, 2024
    Inventors: YOKO KUGE, YASUO SUGAWARA, YUDAI KAWASAKI, SHUICHIRO CHIBA, Masaki IZUMI, MASAFUMI ARAMOTO
  • Publication number: 20240098841
    Abstract: In a case that user equipment (UE) that has established a communication path for direct C2 communication receives, from a network, a PDU session release command message for revoking authentication and/or authorization of the communication path for the direct C2 communication or a PDU session modification command message, the UE can indicate an appropriate cause value in the procedure of releasing the communication path for the direct C2 communication.
    Type: Application
    Filed: February 9, 2023
    Publication date: March 21, 2024
    Inventors: SHUICHIRO CHIBA, YASUO SUGAWARA, YOKO KUGE, Masaki IZUMI
  • Publication number: 20240073803
    Abstract: A unit is provided through an application of a disaster condition to a PLMN in 5GS, the unit being for transmitting and/or receiving a notification in a case that a communication service cannot be provided to a UE and for selecting a roaming destination PLMN by the UE. Provided are a procedure to allow the UE to recognize a state of a certain PLMN and transmit and/or receive information for appropriately selecting a PLMN as a moving destination in a case that a disaster condition applies or no longer applies to the certain PLMN, a method of selecting a PLMN based on information received and stored by the UE through a notification from the PLMN or the like, and a communication unit.
    Type: Application
    Filed: January 14, 2022
    Publication date: February 29, 2024
    Inventors: SHUICHIRO CHIBA, YASUO SUGAWARA, YUDAI KAWASAKI, YOKO KUGE
  • Publication number: 20230187453
    Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.
    Type: Application
    Filed: February 6, 2023
    Publication date: June 15, 2023
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Rihito WADA, Yoko CHIBA
  • Patent number: 11610918
    Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: March 21, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Rihito Wada, Yoko Chiba
  • Publication number: 20220020841
    Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.
    Type: Application
    Filed: September 29, 2021
    Publication date: January 20, 2022
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Rihito WADA, Yoko CHIBA
  • Patent number: 11139359
    Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: October 5, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Rihito Wada, Yoko Chiba
  • Publication number: 20200111816
    Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.
    Type: Application
    Filed: December 5, 2019
    Publication date: April 9, 2020
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Rihito WADA, Yoko CHIBA
  • Patent number: 10559599
    Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: February 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Rihito Wada, Yoko Chiba
  • Publication number: 20180315779
    Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.
    Type: Application
    Filed: June 21, 2018
    Publication date: November 1, 2018
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Rihito WADA, Yoko CHIBA
  • Patent number: 10032796
    Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: July 24, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Rihito Wada, Yoko Chiba
  • Publication number: 20170040409
    Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.
    Type: Application
    Filed: October 18, 2016
    Publication date: February 9, 2017
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Rihito WADA, Yoko CHIBA
  • Patent number: 9564517
    Abstract: To provide a manufacturing method of a highly reliable TFT, by which a more refined pattern can be formed through a process using four or three masks, and a semiconductor device. A channel-etched bottom gate TFT structure is adopted in which a photoresist is selectively exposed to light by rear surface exposure utilizing a gate wiring to form a desirably patterned photoresist, and further, a halftone mask or a gray-tone mask is used as a multi-tone mask. Further, a step of lifting off using a halftone mask or a gray-tone mask and a step of reflowing a photoresist are used.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: February 7, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kunio Hosoya, Saishi Fujikawa, Yoko Chiba
  • Patent number: 9478597
    Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: October 25, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Rihito Wada, Yoko Chiba
  • Publication number: 20160190177
    Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.
    Type: Application
    Filed: March 8, 2016
    Publication date: June 30, 2016
    Inventors: Shunpei YAMAZAKI, Kengo AKIMOTO, Shigeki KOMORI, Hideki UOCHI, Rihito WADA, Yoko CHIBA
  • Patent number: 9343517
    Abstract: A display device includes a pixel portion in which a pixel electrode layer is arranged in a matrix, and an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen is provided corresponding to the pixel electrode layer. In the periphery of the pixel portion in this display device, a pad portion is provided to be electrically connected to a common electrode layer formed on a counter substrate through a conductive layer made of the same material as the pixel electrode layer. One objection of our invention to prevent a defect due to separation of a thin film in various kinds of display devices is realized, by providing a structure suitable for a pad portion provided in a display panel.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: May 17, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Rihito Wada, Yoko Chiba
  • Patent number: 8895333
    Abstract: The number of photomasks is reduced in a method for manufacturing a liquid crystal display device which operates in a fringe field switching mode, whereby a manufacturing process is simplified and manufacturing cost is reduced. A first transparent conductive film and a first metal film are sequentially stacked over a light-transmitting insulating substrate; the first transparent conductive film and the first metal film are shaped using a multi-tone mask which is a first photomask; an insulating film, a first semiconductor film, a second semiconductor film, and a second metal film are sequentially stacked; the second metal film and the second semiconductor film are shaped using a multi-tone mask which is a second photomask; a protective film is formed; the protective film is shaped using a third photomask; a second transparent conductive film is formed; and the second transparent conductive film is shaped using a fourth photomask.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: November 25, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Saishi Fujikawa, Yoko Chiba
  • Publication number: 20140256095
    Abstract: To provide a manufacturing method of a highly reliable TFT, by which a more refined pattern can be formed through a process using four or three masks, and a semiconductor device. A channel-etched bottom gate TFT structure is adopted in which a photoresist is selectively exposed to light by rear surface exposure utilizing a gate wiring to form a desirably patterned photoresist, and further, a halftone mask or a gray-tone mask is used as a multi-tone mask. Further, a step of lifting off using a halftone mask or a gray-tone mask and a step of reflowing a photoresist are used.
    Type: Application
    Filed: May 20, 2014
    Publication date: September 11, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kunio Hosoya, Saishi Fujikawa, Yoko Chiba
  • Patent number: 8427595
    Abstract: To provide a structure suitable for a common connection portion provided in a display panel. A common connection portion provided in an outer region of a pixel portion has a stacked structure of an insulating layer formed using the same layer as a gate insulating layer, an oxide semiconductor layer formed using the same layer as a second oxide semiconductor layer, and a conductive layer (also referred to as a common potential line) formed using the same layer as the conductive layer, in which the conductive layer (also referred to as the common potential line) is connected to a common electrode through an opening in an interlayer insulating layer provided over the first oxide semiconductor layer and an electrode opposite to a pixel electrode is electrically connected to the common electrode through conductive particles.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: April 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kengo Akimoto, Shigeki Komori, Hideki Uochi, Rihito Wada, Yoko Chiba