Patents by Inventor Yong-pil Han

Yong-pil Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11952372
    Abstract: Provided is a tribenzazole amine derivative represented by Formula 1 that effectively absorbs high energy UV light from an external light source to minimize damage to organic materials present in an organic electroluminescent device, contributing to a substantial improvement in the lifetime of the organic electroluminescent device. Also provided is an organic electroluminescent device using the tribenzazole amine derivative. The organic electroluminescent device includes a first electrode, a second electrode, and an organic layer arranged between the first and second electrodes. The organic layer includes the tribenzazole amine derivative.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: April 9, 2024
    Assignee: LAPTO CO., LTD.
    Inventors: Moon-ki Seok, Byung-soo Go, Chul-soo Lim, Hyun-a Kim, Kyou-sic Kim, Yong-pil Park, Kap-jong Han, Eu-gene Oh
  • Publication number: 20080277767
    Abstract: A method of planarizing the surface of a semiconductor substrate to reduce the occurrence of a dishing phenomenon. A patterned etch stop layer defining a trench region is formed on a substrate. The substrate is etched to form a trench region, and a medium material layer and an oxide layer are subsequently formed on the substrate, filling the trench region. Chemical mechanical polishing (CMP) is performed on the oxide layer until the medium material layer is exposed. CMP is then performed until the patterned etch stop layer is exposed and a planarized oxide layer is formed. Because the medium material layer has a higher removal rate during CMP than the oxide layer, occurrences of the dishing phenomenon are reduced. A slurry including an anionic surfactant is used to increase the CMP removal ratio of the medium material layer to the oxide layer.
    Type: Application
    Filed: July 17, 2008
    Publication date: November 13, 2008
    Inventors: Jae-Dong Lee, Yong-Pil Han, Chang-Ki Hong
  • Patent number: 7413959
    Abstract: A method of planarizing the surface of a semiconductor substrate to reduce the occurrence of a dishing phenomenon. A patterned etch stop layer defining a trench region is formed on a substrate. The substrate is etched to form a trench region, and a medium material layer and an oxide layer are subsequently formed on the substrate, filling the trench region. Chemical mechanical polishing (CMP) is performed on the oxide layer until the medium material layer is exposed. CMP is then performed until the patterned etch stop layer is exposed and a planarized oxide layer is formed. Because the medium material layer has a higher removal rate during CMP than the oxide layer, occurrences of the dishing phenomenon are reduced. A slurry including an anionic surfactant is used to increase the CMP removal ratio of the medium material layer to the oxide layer.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: August 19, 2008
    Assignee: Samsung Electronics Co., L.T.D.
    Inventors: Jae-Dong Lee, Yong-Pil Han, Chang-Ki Hong
  • Patent number: 7237561
    Abstract: An apparatus for cleaning a semiconductor wafer and method for cleaning a wafer using the same wherein, the apparatus includes a chamber on which a wafer is mounted, a revolving chuck mounted in the chamber for supporting and fixing the wafer, a nozzle for spraying cleaning solution onto the wafer, a cover for covering an upper part of the chamber, and a light source. The cleaning solution, preferably one of ozone water, hydrogen water, or electrolytic-ionized water, may be heated for a short time and used to clean the wafer.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: July 3, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Im-soo Park, Kun-tack Lee, Yong-pil Han, Sang-rok Hah
  • Patent number: 7230293
    Abstract: A semiconductor memory device is provided, including a substrate and storage nodes formed on the substrate from a silicon oxide layer, the layer having been substantially removed by wet etching the silicon oxide layer to a predetermined depth of the storage nodes and dry etching the remaining portion of the silicon oxide layer to expose the storage nodes.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: June 12, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-yong Kim, Kun-tack Lee, Yong-pil Han
  • Patent number: 7153370
    Abstract: The present application discloses a method of cleaning a semiconductor wafer by mounting a wafer to a chuck, positioning a gas guard, defining therein a chamber having an open bottom, immediately above the layer of water, spraying de-ionized water onto the wafer while rotating the chuck at a location outside the chamber when the wafer is mounted to the chuck, to thereby form a layer of water on the wafer, and spraying a cleaning gas from a gas spraying unit disposed above said chuck through the chamber and into the layer of water to thereby cause the cleaning gas to dissolve in the layer of water, and at the same time moving the chamber across a surface of the wafer, to thereby clean the wafer, wherein said gas spraying unit includes a gas injection tube oriented to inject the cleaning gas towards the wafer mounted to the chuck, and the gas guard connected to the gas injection tube.
    Type: Grant
    Filed: January 19, 2005
    Date of Patent: December 26, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kun-tack Lee, Yong-pil Han, Sang-rok Hah
  • Publication number: 20050142884
    Abstract: A semiconductor memory device is provided, including a substrate and storage nodes formed on the substrate from a silicon oxide layer, the layer having been substantially removed by wet etching the silicon oxide layer to a predetermined depth of the storage nodes and dry etching the remaining portion of the silicon oxide layer to expose the storage nodes.
    Type: Application
    Filed: February 18, 2005
    Publication date: June 30, 2005
    Inventors: Sang-yong Kim, Kun-tack Lee, Yong-pil Han
  • Publication number: 20050121053
    Abstract: A semiconductor wafer cleaning apparatus includes a gas spraying unit, having a gas injection tube and a gas guard extending therearound, for spraying cleaning gas into a water layer formed on a wafer. The gas guard forms a small chamber just above the water layer, so that the partial pressure of gas injected from the gas injection tube is increased in the small chamber, whereupon the cleaning gas readily dissolves in the water layer. As a result, a cleaning solution having a high concentration of cleaning gas is produced, whereby the cleaning efficacy of the solution is high. Subsequently, a drying gas, such as isopropyl alcohol, for drying the wafer can be ejected onto the water layer using the gas spraying unit. Thus, the semiconductor wafer cleaning apparatus has a simple structure.
    Type: Application
    Filed: January 19, 2005
    Publication date: June 9, 2005
    Inventors: Kun-tack Lee, Yong-pil Han, Sang-rok Hah
  • Patent number: 6903024
    Abstract: A method and semiconductor memory device are provided for manufacturing storage nodes using wet etching and dry etching including, when removing a silicon oxide layer including storage nodes, wet etching a portion of the silicon oxide layer using a buffered oxide etchant (“BOE”) solution or a hydrogen fluoride (“HF”) solution, and dry etching the remaining silicon oxide layer using a mixed gas of anhydrous HF, isopropyl alcohol (“IPA”) and vapor to thereby prevent short circuits caused by fallen storage nodes in the semiconductor memory device.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: June 7, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-yong Kim, Kun-tack Lee, Yong-pil Han
  • Patent number: 6887137
    Abstract: Slurries for chemical mechanical polishing (CMP) are provided including a high planarity slurry and high selectivity ratio slurry. A high planarity slurry includes at least one kind of metal oxide abrasive particle and an anionic polymer passivation agent having a first concentration. A high selectivity ratio slurry includes at least one kind of the metal oxide abrasive particle, the passivation agent in a second concentration that is less than the first concentration of the passivation agent for the high planarity slurry, one of a quaternary amine and the salt thereof, and a pH control agent. The high selectivity ratio slurry has a pH in a range of about over an isoelectric point of a polishing target layer and less than an isoelectric point of a polishing stopper. In addition, a CMP method using the CMP slurries having high planarity and high selectivity ratio is provided.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: May 3, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-dong Lee, Bo-un Yoon, Yong-pil Han
  • Patent number: 6860277
    Abstract: A semiconductor wafer cleaning apparatus includes a gas spraying unit, having a gas injection tube and a gas guard extending therearound, for spraying cleaning gas into a water layer formed on a wafer. The gas guard forms a small chamber just above the water layer, so that the partial pressure of gas injected from the gas injection tube is increased in the small chamber, whereupon the cleaning gas readily dissolves in the water layer. As a result, a cleaning solution having a high concentration of cleaning gas is produced, whereby the cleaning efficacy of the solution is high. Subsequently, a drying gas, such as isopropyl alcohol, for drying the wafer can be ejected onto the water layer using the gas spraying unit. Thus, the semiconductor wafer cleaning apparatus has a simple structure.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: March 1, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kun-tack Lee, Yong-pil Han, Sang-rok Hah
  • Publication number: 20050003669
    Abstract: HF vapor processes are provided for etching oxide on a semiconductor substrate, cleaning a substrate, or cleaning a metal structure on a substrate. In the processes, a semiconductor substrate to be cleaned or having oxide to be etched is exposed to anhydrous hydrofluoric acid vapor and water vapor at a substrate temperature greater than about 40° C. Control of substrate temperature, hydrofluoric acid vapor pressure and water vapor pressure inhibits formation of liquid on the substrate and forms on the substrate a sub-monolayer of etch reactant and product molecules by adsorption of etch reactant and product molecules at less than about 95% of oxide adsorption sites.
    Type: Application
    Filed: May 21, 2004
    Publication date: January 6, 2005
    Applicant: Massachusetts Institute of Technology
    Inventors: Yong-Pil Han, Herbert Sawin
  • Publication number: 20040173236
    Abstract: An apparatus for cleaning a semiconductor wafer and method for cleaning a wafer using the same wherein, the apparatus includes a chamber on which a wafer is mounted, a revolving chuck mounted in the chamber for supporting and fixing the wafer, a nozzle for spraying cleaning solution onto the wafer, a cover for covering an upper part of the chamber, a heating lamp fixed on an upper part of the cover for heating the wafer or the cleaning solution, a cooling water conduit surrounding the cover, and an antipollution plate mounted on a lower part of the heating lamp in the cover for preventing the heating lamp from being polluted by the cleaning solution. According to an embodiment of the present invention, the cleaning solution, preferably of ozone water, hydrogen water, or electrolytic-ionized water, is heated for a short time and used to clean the wafer.
    Type: Application
    Filed: October 16, 2003
    Publication date: September 9, 2004
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Im-soo Park, Kun-tack Lee, Yong-pil Han, Sang-rok Hah
  • Patent number: 6740247
    Abstract: The invention provides HF vapor process conditions that can be precisely controlled with a high degree of reproducibility for a wide range of starting wafer conditions. These HF vapor processes for, e.g., etching oxide on a semiconductor substrate, cleaning a contaminant on a semiconductor substrate, removing etch residue from a metal structure on a semiconductor substrate, and cleaning a metal contact region of a semiconductor substrate. In the HF vapor process, a semiconductor substrate having oxide, a contaminant, metal etch residue, or a contact region to be processed is exposed to hydrofluoric acid vapor and water vapor in a process chamber held at temperature and pressure conditions that are controlled to form on the substrate no more than a sub-monolayer of etch reactants and products produced by the vapor as the substrate is processed by the vapor.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: May 25, 2004
    Assignee: Massachusetts Institute of Technology
    Inventors: Yong-Pil Han, Herbert H. Sawin
  • Patent number: 6712078
    Abstract: An apparatus for cleaning a semiconductor wafer and method for cleaning a wafer using the same wherein, the apparatus includes a chamber on which a wafer is mounted, a revolving chuck mounted in the chamber for supporting and fixing the wafer, a nozzle for spraying cleaning solution onto the wafer, a cover for covering an upper part of the chamber, a heating lamp fixed on an upper part of the cover for heating the wafer or the cleaning solution, a cooling water conduit surrounding the cover, and an antipollution plate mounted on a lower part of the heating lamp in the cover for preventing the heating lamp from being polluted by the cleaning solution. According to an embodiment of the present invention, the cleaning solution, preferably of ozone water, hydrogen water, or electrolytic-ionized water, is heated for a short time and used to clean the wafer.
    Type: Grant
    Filed: July 6, 2001
    Date of Patent: March 30, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Im-soo Park, Kun-tack Lee, Yong-pil Han, Sang-rok Hah
  • Publication number: 20040029375
    Abstract: A method of planarizing the surface of a semiconductor substrate to reduce the occurrence of a dishing phenomenon. A patterned etch stop layer defining a trench region is formed on a substrate. The substrate is etched to form a trench region, and a medium material layer and an oxide layer are subsequently formed on the substrate, filling the trench region. Chemical mechanical polishing (CMP) is performed on the oxide layer until the medium material layer is exposed. CMP is then performed until the patterned etch stop layer is exposed and a planarized oxide layer is formed. Because the medium material layer has a higher removal rate during CMP than the oxide layer, occurrences of the dishing phenomenon are reduced. A slurry including an anionic surfactant is used to increase the CMP removal ratio of the medium material layer to the oxide layer.
    Type: Application
    Filed: April 21, 2003
    Publication date: February 12, 2004
    Inventors: Jae-Dong Lee, Yong-Pil Han, Chang-Ki Hong
  • Publication number: 20040018683
    Abstract: A method and semiconductor memory device are provided for manufacturing storage nodes using wet etching and dry etching including, when removing a silicon oxide layer including storage nodes, wet etching a portion of the silicon oxide layer using a buffered oxide etchant (“BOE”) solution or a hydrogen fluoride (“HF”) solution, and dry etching the remaining silicon oxide layer using a mixed gas of anhydrous HF, isopropyl alcohol (“IPA”) and vapor to thereby prevent short circuits caused by fallen storage nodes in the semiconductor memory device.
    Type: Application
    Filed: May 8, 2003
    Publication date: January 29, 2004
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang-Yong Kim, Kun-Tack Lee, Yong-Pil Han
  • Publication number: 20030166381
    Abstract: Slurries for chemical mechanical polishing (CMP) are provided including a high planarity slurry and high selectivity ratio slurry. A high planarity slurry includes at least one kind of metal oxide abrasive particle and an anionic polymer passivation agent having a first concentration. A high selectivity ratio slurry includes at least one kind of the metal oxide abrasive particle, the passivation agent in a second concentration that is less than the first concentration of the passivation agent for the high planarity slurry, one of a quaternary amine and the salt thereof, and a pH control agent. The high selectivity ratio slurry has a pH in a range of about over an isoelectric point of a polishing target layer and less than an isoelectric point of a polishing stopper. In addition, a CMP method using the CMP slurries having high planarity and high selectivity ratio is provided.
    Type: Application
    Filed: February 28, 2003
    Publication date: September 4, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Dong Lee, Bo-Un Yoon, Yong-Pil Han
  • Publication number: 20030145875
    Abstract: An apparatus for cleaning a semiconductor wafer includes a cleaning reaction chamber wherein the cleaning process is performed in a closed state, a wafer conveyor having wafer supporters for loading semiconductor onto a loading unit within the reaction chamber, at least one cleaning gas supply unit for supplying at least one cleaning solution in a vapor state into the reaction chamber, a water vaporizing unit for supplying vapor onto the semiconductor wafers, an ozone supply unit for supplying ozone gas into the reaction chamber, and a reaction gas exhaustion unit connected to the reaction chamber in order to exhaust the cleaning gas from the reaction chamber. The cleaning of the semiconductor wafers by adding cleaning gas and ozone gas into a reaction chamber easily removes any remaining photoresist that formed on the semiconductor wafers and any other contaminates from pre-processes.
    Type: Application
    Filed: February 3, 2003
    Publication date: August 7, 2003
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Dong-Gyun Han, Kun-Tack Lee, Yong-Pil Han, Hyung-Ho Ko
  • Publication number: 20030062068
    Abstract: The surface of a semiconductor wafer is cleaned simultaneously using diluted hydrofluoric acid and electrolytic ionized water. The electrolytic ionized water is produced using an electrolyte supplied into an intermediate cell of a 3-cell electrolyzer. The 3-cell electrolyzer has an anode cell, the intermediate cell, and a cathode cell partitioned from one another by ion exchange membranes. After deionized water is supplied into the anode cell and the cathode cell and the intermediate cell is filled with an electrolytic aqueous solution, electrolysis is carried out to produce electrolytic ionized water. The electrolytic ionized water and the hydrofluoric acid solution are then supplied to one or more semiconductor wafer cleaning apparatus. The simultaneous use of the electrolytic ionized water and the diluted hydrofluoric acid offers an improvement in removing contaminants from the surface of the wafer without damaging an insulating layer or a metal layer exposed at the surface of the semiconductor wafer.
    Type: Application
    Filed: May 1, 2002
    Publication date: April 3, 2003
    Inventors: Hyung-Ho Ko, Kun-Tack Lee, Im-Soo Park, Yong-Pil Han, Song-Rok Ha