Patents by Inventor Yong-Seung Bang

Yong-Seung Bang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • CHIP TO PACKAGE INTERACTION TEST VEHICLE AND METHOD FOR TESTING CHIP TO PACKAGE INTERACTION USING THE SAME
    Publication number: 20150253374
    Abstract: A chip to package interaction (CPI) test vehicle includes a chip including metal patterns contained in first and second sub-regions, respectively, and in which any one of the following comparable properties (a)˜(e) is the same among the first and second sub-regions, and another one of the properties (a)˜(e) is different among the first and second sub-regions: (a) size and shape of the sub-region, (b) metal density of the metal pattern, (c) type of the metal pattern, (d) distance between the sub-region and a center of the chip, (e) structure of the metal pattern.
    Type: Application
    Filed: February 12, 2015
    Publication date: September 10, 2015
    Inventors: SANG-MAN LEE, YOUNG-MIN KANG, YONG-SEUNG BANG
  • Array variable capacitor apparatus
    Patent number: 8040656
    Abstract: An array variable capacitor apparatus includes a line unit including a ground line and a signal line which operates as a lower electrode; and a plurality of plates which are engaged with the line unit to generate capacitance and which operate as upper electrodes, the plurality of plates being arranged in an array pattern and having different degrees of stiffness.
    Type: Grant
    Filed: October 17, 2008
    Date of Patent: October 18, 2011
    Assignees: Samsung Electronics Co., Ltd., Seoul National University Industry Foundation
    Inventors: Yun-Kwon Park, Jea-Shik Shin, Yong-Kweon Kim, Yong-Seung Bang
  • ARRAY VARIABLE CAPACITOR APPARATUS
    Publication number: 20090185325
    Abstract: An array variable capacitor apparatus includes a line unit including a ground line and a signal line which operates as a lower electrode; and a plurality of plates which are engaged with the line unit to generate capacitance and which operate as upper electrodes, the plurality of plates being arranged in an array pattern and having different degrees of stiffness.
    Type: Application
    Filed: October 17, 2008
    Publication date: July 23, 2009
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SEOUL NATIONAL UNIVERSITY INDUSTRY FOUNDATION
    Inventors: Yun-kwon PARK, Jea-shik SHIN, Yong-kweon KIM, Yong-seung BANG