Patents by Inventor Yong Soo Jung
Yong Soo Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11961720Abstract: Disclosed herein is a multi-channel device for detecting plasma at an ultra-fast speed, including: a first antenna module connected to a first output terminal in contact with a substrate on a chuck of a process chamber and extending to ground, and receiving a first leakage current leaking through the substrate to increase reception sensitivity of the leakage current; a first current detection module detecting the first leakage current; a current measurement module receiving the first leakage current output from the first current detection module, and extracting the received first leakage current for each predetermined period to generate a first leakage current measurement information; and a control module comparing the first leakage current measurement information with a reference value to generate first arcing occurrence information.Type: GrantFiled: October 12, 2021Date of Patent: April 16, 2024Assignee: T.O.S Co., Ltd.Inventors: Yong Kyu Kim, Bum Ho Choi, Yong Sik Kim, Kwang Ki Kang, Hong Jong Jung, Seok Ho Lee, Seung Soo Lee
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Publication number: 20240078218Abstract: The apparatus for validating various kinds of data and a digital twin operation includes a validation target data selector configured to select a target to be validated among various kinds of input data, a data validator configured to validate individual data for each type of data selected for validation, and a data linkage validator configured to validate various kinds of multiple data by linking the various kinds of multiple data in order to detect an error in a process of linking the various kinds of multiple data.Type: ApplicationFiled: August 29, 2023Publication date: March 7, 2024Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Myung-Sun BAEK, Young Soo PARK, Yong Tae LEE, Eui Suk JUNG
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Patent number: 11329416Abstract: A connector apparatus includes a housing having an upper surface portion formed with an accommodation space, and a position assurance to be inserted into the accommodation space of the housing. When the position assurance is mounted in the housing, a mounting portion of the position assurance is exposed on a side surface portion of the housing, such that visibility at the time of work is improved. In addition, the position assurance is connected to the housing in a catching structure, such that it is easy to mount and demount the position assurance and mounting strength is secured.Type: GrantFiled: October 23, 2020Date of Patent: May 10, 2022Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATIONInventors: Jong Soo Kim, Yong Soo Jung
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Publication number: 20220021147Abstract: A connector apparatus includes a housing having an upper surface portion formed with an accommodation space, and a position assurance to be inserted into the accommodation space of the housing. When the position assurance is mounted in the housing, a mounting portion of the position assurance is exposed on a side surface portion of the housing, such that visibility at the time of work is improved. In addition, the position assurance is connected to the housing in a catching structure, such that it is easy to mount and demount the position assurance and mounting strength is secured.Type: ApplicationFiled: October 23, 2020Publication date: January 20, 2022Applicants: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATIONInventors: Jong Soo KIM, Yong Soo JUNG
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Patent number: 10469468Abstract: An apparatus and a method are provided for automatically converting a user interface (UI). A Bluetooth-automatic authentication function is performed so as to automatically convert a current set UI to a stored UI corresponding to an authenticated Bluetooth terminal. In order to automatically convert UI of a terminal which is automatically authenticated in a short communication mode, at least one terminal ID for automatic authentication and UI configuration information corresponding to the terminal ID are set. When a terminal ID for automatic authentication is searched in a short distance communicating mode, a terminal corresponding to the searched terminal ID is automatically authenticated. The present UI configuration information corresponding to the automatically authenticated terminal is automatically applied to a current terminal UI, so that a current UI such as a main screen and a main menu category can be automatically converted to a preset UI corresponding to each authenticated Bluetooth terminal.Type: GrantFiled: September 2, 2008Date of Patent: November 5, 2019Assignee: Samsung Electronics Co., LtdInventors: Sang-Mo Hong, Yong-Soo Jung
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Publication number: 20120102145Abstract: A server, a user terminal and a method of providing service by uploading at least one content list generated by packaging a plurality of content, extracting a core content by considering a packaging frequency for each content included in the at least one content list; and recommending an extracted core content to a user if requested by a user.Type: ApplicationFiled: September 23, 2011Publication date: April 26, 2012Applicant: Samsung Electronics Co., Ltd.Inventors: Hee-jae JUNG, Jung-hwan Kim, So-jin Kim, Yong-soo Jung
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Publication number: 20120015510Abstract: A method of fabricating a semiconductor device includes forming a mask pattern for defining a region of a semiconductor substrate. A field stop dopant layer will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.Type: ApplicationFiled: July 19, 2011Publication date: January 19, 2012Applicant: Hynix Semiconductor Inc.Inventors: Min Yong LEE, Yong Soo Jung
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Publication number: 20110275205Abstract: A method of fabricating a semiconductor device includes forming a mask pattern for defining a region on a semiconductor substrate. A well will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.Type: ApplicationFiled: July 19, 2011Publication date: November 10, 2011Applicant: Hynix Semiconductor Inc.Inventors: Min Yong LEE, Yong Soo JUNG
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Publication number: 20110275203Abstract: A method of fabricating a semiconductor device includes forming a mask pattern for defining a region of a semiconductor substrate. An impurity layer for adjusting the threshold voltage of a cell will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.Type: ApplicationFiled: July 19, 2011Publication date: November 10, 2011Applicant: Hynix Semiconductor Inc.Inventors: Min Yong Lee, Yong Soo Jung
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Publication number: 20110275204Abstract: A method of fabricating a semiconductor device includes forming a mask pattern for defining a region of a semiconductor substrate. An impurity layer for suppressing punch-through will be formed in the defined region. Dopant ions are implanted into the defined region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.Type: ApplicationFiled: July 19, 2011Publication date: November 10, 2011Applicant: Hynix Semiconductor Inc.Inventors: Min Yong LEE, Yong Soo Jung
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Patent number: 7981782Abstract: A method of fabricating a semiconductor device includes forming a mask pattern for exposing a region of a semiconductor substrate. Dopant ions are implanted into the exposed region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.Type: GrantFiled: June 1, 2007Date of Patent: July 19, 2011Assignee: Hynix Semiconductor Inc.Inventors: Min Yong Lee, Yong Soo Jung
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Patent number: 7790551Abstract: A transistor having a recess gate structure and a method for fabricating the same. The transistor includes a gate insulating layer formed on the inner walls of first trenches formed in a semiconductor substrate; a gate conductive layer formed on the gate insulating layer for partially filling the first trenches; gate electrodes formed on the gate conductive layer for completely filling the first trenches, and surrounded by the gate conductive layer; channel regions formed in the semiconductor substrate along the first trenches; and source/drain regions formed in a shallow portion of the semiconductor substrate.Type: GrantFiled: October 22, 2009Date of Patent: September 7, 2010Assignee: Hynix Semiconductor Inc.Inventors: Kyoung Bong Rouh, Seung Woo Jin, Min Yong Lee, Yong Soo Jung
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Patent number: 7687852Abstract: A semiconductor device having recess gates and a method for fabricating the same. The semiconductor device includes a semiconductor substrate having inverse triangular recesses formed therein; a gate insulating film having a designated thickness formed on the semiconductor substrate; gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; and first and second junction regions formed in the semiconductor substrate and opposed to each other so that the corresponding one of the gate electrodes is interposed therebetween.Type: GrantFiled: February 16, 2009Date of Patent: March 30, 2010Assignee: Hynix Semiconductor Inc.Inventors: Kyoung Bong Rouh, Seung Woo Jin, Min Yong Lee, Yong Soo Jung
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Patent number: 7678653Abstract: A semiconductor device having recess gates and a method for fabricating the same. The semiconductor device includes a semiconductor substrate having inverse triangular recesses formed therein; a gate insulating film having a designated thickness formed on the semiconductor substrate; gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; and first and second junction regions formed in the semiconductor substrate and opposed to each other so that the corresponding one of the gate electrodes is interposed therebetween.Type: GrantFiled: February 16, 2009Date of Patent: March 16, 2010Assignee: Hynix Semiconductor Inc.Inventors: Kyoung Bong Rouh, Seung Woo Jin, Min Yong Lee, Yong Soo Jung
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Publication number: 20100041196Abstract: A transistor having a recess gate structure and a method for fabricating the same. The transistor includes a gate insulating layer formed on the inner walls of first trenches formed in a semiconductor substrate; a gate conductive layer formed on the gate insulating layer for partially filling the first trenches; gate electrodes formed on the gate conductive layer for completely filling the first trenches, and surrounded by the gate conductive layer; channel regions formed in the semiconductor substrate along the first trenches; and source/drain regions formed in a shallow portion of the semiconductor substrate.Type: ApplicationFiled: October 22, 2009Publication date: February 18, 2010Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Kyoung Bong Rouh, Seung Woo Jin, Min Yong Lee, Yong Soo Jung
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Patent number: 7588996Abstract: An oxide pattern forming method comprises forming an oxide layer on a semiconductor substrate, implanting boron ions of not less than 1.0×1016 atoms/cm2 onto the oxide layer in a given region, and wet-etching the oxide layer in the remaining region where the boron ions are not implanted.Type: GrantFiled: June 29, 2007Date of Patent: September 15, 2009Assignee: Hynix Semiconductor Inc.Inventors: Hyo Geun Yoon, Woo Jin Kim, Dong Joo Kim, Ji Yong Park, Yong Soo Jung, Geun Min Choi, Young Wok Song, Sang Hyun Lee
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Patent number: 7576339Abstract: An ion implantation apparatus includes an ion beam source for generating an ion beam; an implantation energy controller disposed on a path of the ion beam for controlling the ion implantation energy of the ion beam so that an ion beam having a first implantation energy is created for a first period of time and an ion beam having a second implantation energy is created for a second period of time; a beam line for accelerating the ion beam; and an end station for mounting a substrate, into which the ion beam accelerated by the beam line is implanted onto the substrate.Type: GrantFiled: June 2, 2006Date of Patent: August 18, 2009Assignee: Hynix Semiconductor Inc.Inventors: Kyoung Bong Rouh, Seung Woo Jin, Min Yong Jung, Yong Soo Jung
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Publication number: 20090173996Abstract: A semiconductor device having recess gates and a method for fabricating the same. The semiconductor device includes a semiconductor substrate having inverse triangular recesses formed therein; a gate insulating film having a designated thickness formed on the semiconductor substrate; gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; and first and second junction regions formed in the semiconductor substrate and opposed to each other so that the corresponding one of the gate electrodes is interposed therebetween.Type: ApplicationFiled: February 16, 2009Publication date: July 9, 2009Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Kyoung Bong Rouh, Seung Woo Jin, Min Yong Lee, Yong Soo Jung
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Publication number: 20090170265Abstract: A semiconductor device having recess gates and a method for fabricating the same. The semiconductor device includes a semiconductor substrate having inverse triangular recesses formed therein; a gate insulating film having a designated thickness formed on the semiconductor substrate; gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; and first and second junction regions formed in the semiconductor substrate and opposed to each other so that the corresponding one of the gate electrodes is interposed therebetween.Type: ApplicationFiled: February 16, 2009Publication date: July 2, 2009Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Kyoung Bong Rouh, Seung Woo Jin, Min Yong Lee, Yong Soo Jung
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Patent number: 7554106Abstract: An ion implantation apparatus comprises an ion beam source for generating an initial ion beam, a bundled ion beam generator adapted to change the initial ion beam into a bundled ion beam based on a predetermined frequency to pass the bundled ion beam for a first time while passing the initial ion beam for a second time, a beam line for accelerating the ion beam having passed through the ion beam generator, and an end station for arranging a wafer therein to allow the ion beam accelerated by the beam line to be implanted in the wafer, the end station operating to move the wafer in a direction perpendicular to an ion beam implantation direction, so as to implant the bundled ion beam in a first region of the wafer and the initial ion beam in a second region of the wafer.Type: GrantFiled: June 1, 2006Date of Patent: June 30, 2009Assignee: Hynix Semiconductor Inc.Inventors: Kyoung Bong Rouh, Seung Woo Jin, Min Yong Lee, Yong Soo Jung