Abstract: A semiconductor memory device includes a bit line, a channel pattern including a horizontal channel portion on the bit line and a vertical channel portion vertically protruding from the horizontal channel portion, a word line on the horizontal channel portion and on a sidewall of the vertical channel portion, and a gate insulating pattern between the word line and the channel pattern. The channel pattern includes an oxide semiconductor and includes first, second, and third channel layers sequentially stacked. The first to third channel layers include a first metal, and the second channel layer further includes a second metal different from the first metal. At least a portion of the first channel layer contacts the bit line.

Abstract: A semiconductor device includes: a substrate; a conductive line extending on the substrate in a first horizontal direction; an isolation insulating layer extending on the substrate and the conductive line in a second horizontal direction intersecting with the first horizontal direction, and defining a channel trench extending through the isolation insulating layer from an upper surface of the isolation insulating layer to a lower surface of the isolation insulating layer; a crystalline oxide semiconductor layer extending along at least a portion of an inner side surface of the channel trench and at least a portion of a bottom surface of the channel trench and coming in contact with the conductive line; and a gate electrode extending on the crystalline oxide semiconductor layer inside the channel trench in the second horizontal direction.

Abstract: A semiconductor device includes a channel layer disposed on a substrate and a gate structure formed on or under the channel layer. The channel layer includes a single-layer oxide semiconductor material, the channel layer includes indium (In), gallium (Ga), and oxygen (O), the channel layer includes a first region, a second region, and a third region, the third region contacting the gate structure, a second region between the first region and the third region, the first region is the closer to the substrate than the second region and the third region, each of the first region and the third region has a concentration of Ga higher than a concentration of In, and the second region has a concentration of In higher than a concentration of Ga.

Abstract: Disclosed is a semiconductor device comprising an oxide semiconductor layer on a substrate and including a first part and a pair of second parts that are spaced apart from each other across the first part, a gate electrode on the first part of the oxide semiconductor layer, and a pair of electrodes on corresponding second parts of the oxide semiconductor layer. A first thickness of the first part of the oxide semiconductor layer is less than a second thickness of each second part of the oxide semiconductor layer. A number of oxygen vacancies in the first part of the oxide semiconductor layer is less than a number of oxygen vacancies in each second part of the oxide semiconductor layer.

Abstract: A semiconductor device includes a conductive line that extends in a first direction on a substrate, a first oxide semiconductor layer, including a first crystalline oxide semiconductor material containing a first metal element, on the conductive line, a second oxide semiconductor layer, which is in physical contact with the first oxide semiconductor layer and is connected to the conductive line, on the conductive line, a gate electrode that extends in a second direction, which crosses the first direction, on a side of the second oxide semiconductor layer, and a capacitor structure connected to the second oxide semiconductor layer on the second oxide semiconductor layer and the gate electrode, wherein the second oxide semiconductor layer includes a second crystalline oxide semiconductor material containing the first metal element and second and third metal elements, which are different from the first metal element.

Abstract: A method of forming a low-k layer includes forming a layer by providing a silicon source, a carbon source, an oxygen source, and a nitrogen source onto a substrate. The forming of the layer includes a plurality of main cycles, and each of the main cycles includes providing the silicon source, providing the carbon source, providing the oxygen source, and providing the nitrogen source, each of which is performed at least one time. Each of the main cycles includes sub-cycles in which the providing of the carbon source and the providing of the oxygen source are alternately performed.

Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgas sing prevention pattern sequentially stacked.

Abstract: A material layer, a semiconductor device including the material layer, and methods of forming the material layer and the semiconductor device are provided herein. A method of forming a SiOCN material layer may include supplying a silicon source onto a substrate, supplying a carbon source onto the substrate, supplying an oxygen source onto the substrate, supplying a nitrogen source onto the substrate, and supplying hydrogen onto the substrate. When a material layer is formed according to a method of the present inventive concepts, a material layer having a high tolerance to wet etching and/or good electric characteristics may be formed, and may even be formed when the method is performed at a low temperature.

Abstract: A method of forming a SiOCN material layer, a material layer stack, a semiconductor device, a method of fabricating a semiconductor device, and a deposition apparatus, the method of forming a SiOCN material layer including providing a substrate; providing a silicon precursor onto the substrate; providing an oxygen reactant onto the substrate; providing a first carbon precursor onto the substrate; providing a second carbon precursor onto the substrate; and providing a nitrogen reactant onto the substrate, wherein the first carbon precursor and the second carbon precursor are different materials.

Abstract: A method of forming a low-k layer includes forming a layer by providing a silicon source, a carbon source, an oxygen source, and a nitrogen source onto a substrate. The forming of the layer includes a plurality of main cycles, and each of the main cycles includes providing the silicon source, providing the carbon source, providing the oxygen source, and providing the nitrogen source, each of which is performed at least one time. Each of the main cycles includes sub-cycles in which the providing of the carbon source and the providing of the oxygen source are alternately performed.

Abstract: A method of forming a SiOCN material layer, a material layer stack, a semiconductor device, a method of fabricating a semiconductor device, and a deposition apparatus, the method of forming a SiOCN material layer including providing a substrate; providing a silicon precursor onto the substrate; providing an oxygen reactant onto the substrate; providing a first carbon precursor onto the substrate; providing a second carbon precursor onto the substrate; and providing a nitrogen reactant onto the substrate, wherein the first carbon precursor and the second carbon precursor are different materials.

Abstract: A method of forming a SiOCN material layer, a material layer stack, a semiconductor device, a method of fabricating a semiconductor device, and a deposition apparatus, the method of forming a SiOCN material layer including providing a substrate; providing a silicon precursor onto the substrate; providing an oxygen reactant onto the substrate; providing a first carbon precursor onto the substrate; providing a second carbon precursor onto the substrate; and providing a nitrogen reactant onto the substrate, wherein the first carbon precursor and the second carbon precursor are different materials.

Abstract: A method for fabricating a semiconductor device includes forming a stacked structure including at least one sacrificial layer and at least one semiconductor layer alternately stacked on a substrate, forming a dummy gate structure on the stacked structure, etching a recess in the stacked structure using the dummy gate structure as a mask, etching portions of the sacrificial layer exposed by the recess to form an etched sacrificial layer, forming a first spacer film on the etched sacrificial layer, forming a second spacer film on the first spacer film, the second spacer film including a material different from a material of the first spacer film, removing a first portion of the second spacer film, such that a second portion of the second spacer film remains, and forming a third spacer film on the second portion of the second spacer film.

Abstract: A method of manufacturing an integrated circuit device and an integrated circuit device prepared according to the method, the method including forming a silicon oxycarbonitride (SiOCN) material layer on an active region of a substrate, the forming the SiOCN material layer including using a precursor that has a bond between a silicon (Si) atom and a carbon (C) atom; etching a portion of the active region to form a recess in the active region; baking a surface of the recess at about 700° C. to about 800° C. under a hydrogen (H2) atmosphere, and exposing the SiOCN material layer to the atmosphere of the baking while performing the baking; and growing a semiconductor layer from the surface of the recess baked under the hydrogen atmosphere.

Abstract: A method for fabricating a semiconductor device includes forming a stacked structure including at least one sacrificial layer and at least one semiconductor layer alternately stacked on a substrate, forming a dummy gate structure on the stacked structure, etching a recess in the stacked structure using the dummy gate structure as a mask, etching portions of the sacrificial layer exposed by the recess to form an etched sacrificial layer, forming a first spacer film on the etched sacrificial layer, forming a second spacer film on the first spacer film, the second spacer film including a material different from a material of the first spacer film, removing a first portion of the second spacer film, such that a second portion of the second spacer film remains, and forming a third spacer film on the second portion of the second spacer film.

Abstract: An integrated circuit device includes: a pair of width-setting patterns over a substrate, the pair of width-setting patterns defining a width of a gate structure space in a first direction and extending in a second direction intersecting with the first direction. A gate electrode layer is provided that extends in the gate structure space along the second direction. A gate insulating layer is provided in the gate structure space and between the substrate and the gate electrode layer. An insulating spacer is provides on the pair of width-setting patterns, the insulating spacer covering both sidewalls of the gate electrode layer, wherein the pair of width-setting patterns have a carbon content that is greater than a carbon content of the insulating spacer.

Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgas sing prevention pattern sequentially stacked.

Abstract: An integrated circuit device includes a fin type active area protruding from a substrate and having an upper surface at a first level; a nanosheet extending in parallel to the upper surface of the fin type active area and comprising a channel area, the nanosheet being located at a second level spaced apart from the upper surface of the fin type active area; a gate disposed on the fin type active area and surrounding at least a part of the nanosheet, the gate extending in a direction crossing the fin type active area; a gate dielectric layer disposed between the nanosheet and the gate; a source and drain region formed on the fin type active area and connected to one end of the nanosheet; a first insulating spacer on the nanosheet, the first insulating spacer covering sidewalls of the gate; and a second insulating spacer disposed between the gate and the source and drain region in a space between the upper surface of the fin type active area and the nanosheet, the second insulating spacer having a multilayer st

Abstract: A method of manufacturing an integrated circuit device and an integrated circuit device prepared according to the method, the method including forming a silicon oxycarbonitride (SiOCN) material layer on an active region of a substrate, the forming the SiOCN material layer including using a precursor that has a bond between a silicon (Si) atom and a carbon (C) atom; etching a portion of the active region to form a recess in the active region; baking a surface of the recess at about 700° C. to about 800° C. under a hydrogen (H2) atmosphere, and exposing the SiOCN material layer to the atmosphere of the baking while performing the baking; and growing a semiconductor layer from the surface of the recess baked under the hydrogen atmosphere.

Abstract: A semiconductor device includes an active fin on a substrate, a gate structure on the active fin, a gate spacer structure on a sidewall of the gate structure, and a source/drain layer on at least a portion of the active fin adjacent the gate spacer structure. The gate spacer structure includes a wet etch stop pattern, an oxygen-containing silicon pattern, and an outgassing prevention pattern sequentially stacked.