Patents by Inventor Yong Sung Eom

Yong Sung Eom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190211231
    Abstract: Provided are an adhesive film, and a method of fabricating a semiconductor package using the same. The adhesive film includes a thermoplastic resin containing a hydroxyl group, a thermosetting resin, and an anhydride.
    Type: Application
    Filed: December 14, 2018
    Publication date: July 11, 2019
    Inventors: KeonSoo JANG, Yong Sung EOM, Kwang-Seong CHOI, Seok-Hwan MOON, Hyun-cheol BAE
  • Publication number: 20190067235
    Abstract: Provided is a method of fabricating a semiconductor package. The method includes preparing a package substrate having a substrate pad, and mounting a semiconductor chip on the substrate pad. Mounting the semiconductor chip includes forming a resin layer containing a solder and reducing agent granules having a first capsule layer, between a chip pad of the semiconductor chip and the substrate pad, and bonding the chip pad to the substrate pad using laser irradiated to the semiconductor chip.
    Type: Application
    Filed: August 28, 2018
    Publication date: February 28, 2019
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Kwang-Seong CHOI, Yong-Sung Eom, Keon-Soo Jang, Seok Hwan Moon, Hyun-Cheol Bae, leeseul Jeong, Wagno Alves Braganca Junior
  • Patent number: 9980393
    Abstract: A pattern-forming method for forming a conductive circuit pattern, the pattern-forming method including the steps of: preparing a pattern-forming composition composed of: Cu powder; solder particles for electrically coupling the Cu powder; a polymer resin; a deforming agent that is selected from among acrylate oligomer, polyglycols, glycerides, polypropylene glycol, dimethyl silicon, simethinecone, tributyl phosphare, and polymethylsiloxane, and that increases bonding force between the Cu powder and the solder particles; a curing agent; and a reductant; forming a circuit pattern by printing the pattern-forming composition on a substrate; heating the circuit pattern at a temperature effective to cure the pattern-forming composition and provide the conductive circuit pattern; and electrolytically plating a metal layer onto the conductive circuit pattern. A circuit pattern having superior conductivity is formed at low cost.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: May 22, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Sung Eom, Kwang-Seong Choi, Hyun-cheol Bae, Jung Hyun Noh, Jong Tae Moon
  • Patent number: 9853010
    Abstract: Provided is a method of fabricating a semiconductor package. The method includes providing a package substrate including a pad, mounting a semiconductor chip with a solder ball on the package substrate to allow the solder ball to be disposed on the pad, filling a space between the package substrate and the semiconductor chip with a underfill resin including a reducing agent comprising a carboxyl group, and irradiating the semiconductor chip with a laser to bond the solder ball to the pad, wherein the bonding of the solder ball to the pad comprises changing a metal oxide layer formed on surfaces of the pad and the solder ball to a metal layer by heat generated by the laser.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: December 26, 2017
    Assignee: ELECTGRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Seong Choi, Hyun-cheol Bae, Yong Sung Eom, Jin Ho Lee, Haksun Lee
  • Publication number: 20170141071
    Abstract: Provided is a method of fabricating a semiconductor package. The method includes providing a package substrate including a pad, mounting a semiconductor chip with a solder ball on the package substrate to allow the solder ball to be disposed on the pad, filling a space between the package substrate and the semiconductor chip with a underfill resin including a reducing agent comprising a carboxyl group, and irradiating the semiconductor chip with a laser to bond the solder ball to the pad, wherein the bonding of the solder ball to the pad comprises changing a metal oxide layer formed on surfaces of the pad and the solder ball to a metal layer by heat generated by the laser.
    Type: Application
    Filed: December 3, 2015
    Publication date: May 18, 2017
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Seong CHOI, Hyun-cheol BAE, Yong Sung EOM, Jin Ho LEE, Haksun LEE
  • Patent number: 9538666
    Abstract: Provided is a bonding structure of an electronic equipment including first electrodes extended in a first direction and arranged in a second direction on a stretchable display panel having stretchability, second electrodes extended in a first direction and arranged in a second direction on a substrate and facing the first electrodes, and solder bonding parts interposed between the first electrodes and the second electrodes, facing each other in the second direction, and constituting a plurality of rows in the first direction.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: January 3, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Seong Choi, Hyun-cheol Bae, Haksun Lee, Yong Sung Eom
  • Publication number: 20160358892
    Abstract: Provided is a method for manufacturing a semiconductor package, which includes providing a first substrate, providing, over the first substrate, a second substrate including an active region in which a semiconductor element is disposed and a periphery region surrounding the active region, providing an adhesive membrane between the first and second substrates, and mounting the second substrate on the first substrate, wherein the mounting of the second substrate includes aligning the second substrate on the first substrate by using an alignment member protruding from the periphery region of the second substrate.
    Type: Application
    Filed: June 2, 2016
    Publication date: December 8, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Haksun LEE, KWANG-SEONG CHOI, Hyun-cheol BAE, Yong Sung EOM
  • Patent number: 9490198
    Abstract: Provided is a transmitter and receiver package including an interposer substrate including a top surface, a bottom surface facing the top surface, and a through-via, semiconductor devices mounted on the top surface of the interposer substrate, an exothermic element mounted on the bottom surface of the interposer substrate, and a heat dissipation member disposed on the bottom surface of the interposer substrate, the heat dissipation member being configured to cover the exothermic element.
    Type: Grant
    Filed: December 3, 2015
    Date of Patent: November 8, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventor: Yong Sung Eom
  • Patent number: 9462736
    Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: October 4, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Sung Eom, Jong Tae Moon, Sangwon Oh, Keonsoo Jang
  • Publication number: 20160094258
    Abstract: Provided are a transceiver module and a communication apparatus including the same. The transceiver module includes a lower substrate, a thermoelectric device on the lower substrate, and an upper substrate which is disposed on the thermoelectric device and on which high frequency devices cooled by the thermoelectric device are mounted. The upper substrate includes a ceramic printed circuit board (PCB).
    Type: Application
    Filed: September 17, 2015
    Publication date: March 31, 2016
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hyun-cheol BAE, Yong Sung EOM, Haksun LEE, KWANG-SEONG CHOI
  • Publication number: 20150364445
    Abstract: Provided is a stack module package including: a first substrate where a first device is mounted, and a second substrate where a second device is mounted. The second substrate has a greater thickness than the first substrate, and the second device has a greater thickness than the first device. The first and second devices are vertically connected to each other.
    Type: Application
    Filed: April 13, 2015
    Publication date: December 17, 2015
    Inventors: Kwang Seong CHOI, Hyun Cheol BAE, Yong Sung EOM, Haksun LEE
  • Patent number: 9155236
    Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: October 6, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Sung Eom, Jong Tae Moon, Sangwon Oh, Keonsoo Jang
  • Publication number: 20150237739
    Abstract: The present invention relates to a pattern-forming composition used to form a conductive circuit pattern. The pattern-forming composition comprises Cu powders, a solder for electrically coupling the Cu powders, a polymer resin, a curing agent and a reductant. According to the present invention, a circuit pattern having superior conductivity can be formed at low cost.
    Type: Application
    Filed: May 5, 2015
    Publication date: August 20, 2015
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Yong Sung EOM, Kwang-Seong CHOI, Hyun-cheol BAE, Jung Hyun NOH, Jong Tae MOON
  • Publication number: 20150228617
    Abstract: Provided is a semiconductor device and a method of manufacturing the same. In the method of manufacturing a semiconductor device, a substrate is prepared which is transparent and has a plurality of first electrodes thereon, and a semiconductor chip having a plurality of second electrodes thereon is disposed on the substrate to allow the first and second electrodes to respectively face each other. A polymer layer including solder particles and an oxidizing agent is formed between the substrate and the semiconductor chip, and the solder particles is locally fused between the first and second electrodes by using a laser beam and a fused solder layer is formed which electrically connects between the first and second electrodes.
    Type: Application
    Filed: July 22, 2014
    Publication date: August 13, 2015
    Inventors: Haksun LEE, KWANG-SEONG CHOI, Yong Sung EOM, Hyun-cheol BAE
  • Patent number: 9034750
    Abstract: A method of fabricating a solder-on-pad structure is provided. The method may include providing a substrate with a pad, coating a solder bump maker including a first resin and a solder powder on the substrate, heating the solder bump maker to a temperature lower than a melting point of the solder powder to aggregate the solder powder on the pad, and removing the first resin.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: May 19, 2015
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kwang-Seong Choi, Ho-eun Bae, Hyun-cheol Bae, Yong Sung Eom, Su Jeong Jeon
  • Patent number: 9006037
    Abstract: Provided are methods of forming a bump and a semiconductor device with the same. The method may include providing a substrate with pads, forming a bump maker layer to cover the pads and include a resin and solder particles, thermally treating the bump maker layer to aggregate the solder particles onto the pads, removing the resin to expose the aggregated solder particles, forming a resin layer to cover the aggregated solder particles, and reflowing the aggregated solder particles to form bumps on the pads.
    Type: Grant
    Filed: May 29, 2013
    Date of Patent: April 14, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Kwang-Seong Choi, Yong Sung Eom, Hyun-cheol Bae, Haksun Lee
  • Publication number: 20150043175
    Abstract: Provided is a bonding structure of an electronic equipment including first electrodes extended in a first direction and arranged in a second direction on a stretchable display panel having stretchability, second electrodes extended in a first direction and arranged in a second direction on a substrate and facing the first electrodes, and solder bonding parts interposed between the first electrodes and the second electrodes, facing each other in the second direction, and constituting a plurality of rows in the first direction.
    Type: Application
    Filed: March 18, 2014
    Publication date: February 12, 2015
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: KWANG-SEONG CHOI, Hyun-cheol BAE, Haksun LEE, Yong Sung EOM
  • Publication number: 20140367375
    Abstract: Provided is a method of fabricating a solder particle including adding a first magnetic bar in a first container including a mixture containing first solder particles formed through a mixing process, disposing the first container in a second container including a second magnetic bar, operating the first magnetic bar and the second magnetic bar, and applying heat to the first container to melt the first solder particles.
    Type: Application
    Filed: November 25, 2013
    Publication date: December 18, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Hyun-cheol BAE, Yong Sung EOM, KWANG-SEONG CHOI, Haksun LEE
  • Publication number: 20140317915
    Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.
    Type: Application
    Filed: July 8, 2014
    Publication date: October 30, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Yong Sung EOM, Jong Tae MOON, Sangwon OH, Keonsoo JANG
  • Publication number: 20140317918
    Abstract: Provided are a composition for an anisotropic conductive adhesive, a method of forming a solder bump and a method of forming a flip chip using the same. The composition for an anisotropic conductive adhesive includes a low melting point solder particle and a thermo-curable polymer resin. The anisotropic conductive adhesive includes forming a mixture by mixing a polymer resin and a curing agent, and mixing a deforming agent, a catalyst or a reductant with the mixture.
    Type: Application
    Filed: July 8, 2014
    Publication date: October 30, 2014
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Yong Sung EOM, Jong Tae MOON, Sangwon OH, Keonsoo JANG