Patents by Inventor Yong Top Kim
Yong Top Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9082655Abstract: A nonvolatile memory device having a vertical structure and a method of manufacturing the same, the nonvolatile memory device including a channel region that vertically extends from a substrate; gate electrodes on the substrate, the gate electrodes being disposed along an outer side wall of the channel region and spaced apart from one another; and a channel pad that extends from one side of the channel region to an outside of the channel region, the channel pad covering a top surface of the channel region.Type: GrantFiled: February 14, 2014Date of Patent: July 14, 2015Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Eun-sun Youm, Sang-young Park, Jin-taek Park, Yong-top Kim
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Publication number: 20140162419Abstract: A nonvolatile memory device having a vertical structure and a method of manufacturing the same, the nonvolatile memory device including a channel region that vertically extends from a substrate; gate electrodes on the substrate, the gate electrodes being disposed along an outer side wall of the channel region and spaced apart from one another; and a channel pad that extends from one side of the channel region to an outside of the channel region, the channel pad covering a top surface of the channel region.Type: ApplicationFiled: February 14, 2014Publication date: June 12, 2014Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Eun-sun YOUM, Sang-yong PARK, Jin-taek PARK, Yong-top KIM
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Patent number: 8653585Abstract: A nonvolatile memory device having a vertical structure and a method of manufacturing the same, the nonvolatile memory device including a channel region that vertically extends from a substrate; gate electrodes on the substrate, the gate electrodes being disposed along an outer side wall of the channel region and spaced apart from one another; and a channel pad that extends from one side of the channel region to an outside of the channel region, the channel pad covering a top surface of the channel region.Type: GrantFiled: February 24, 2012Date of Patent: February 18, 2014Assignee: Samsung Electronics Co., Ltd.Inventors: Eun-sun Youm, Sang-yong Park, Jin-taek Park, Yong-top Kim
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Publication number: 20120228697Abstract: A nonvolatile memory device having a vertical structure and a method of manufacturing the same, the nonvolatile memory device including a channel region that vertically extends from a substrate; gate electrodes on the substrate, the gate electrodes being disposed along an outer side wall of the channel region and spaced apart from one another; and a channel pad that extends from one side of the channel region to an outside of the channel region, the channel pad covering a top surface of the channel region.Type: ApplicationFiled: February 24, 2012Publication date: September 13, 2012Inventors: Eun-sun YOUM, Sang-yong PARK, Jin-taek PARK, Yong-top KIM
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Publication number: 20110204430Abstract: A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.Type: ApplicationFiled: April 29, 2011Publication date: August 25, 2011Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Se Jun KIM, Eun Seok CHOI, Kyoung Hwan PARK, Hyun Seung YOO, Myung Shik LEE, Young Ok HONG, Jung Ryul AHN, Yong Top KIM, Kyung Pil HWANG, Won Sic WOO, Jae Young PARK, Ki Hong LEE, Ki Seon PARK, Moon Sig JOO
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Patent number: 7981786Abstract: A method of fabricating a non-volatile memory device having a charge trapping layer includes forming a tunneling layer, a charge trapping layer, a blocking layer and a control gate electrode layer over a substrate, forming a mask layer pattern on the control gate electrode layer, performing an etching process using the mask layer pattern as an etching mask to remove an exposed portion of the control gate electrode layer, wherein the etching process is performed as excessive etching to remove the charge trapping layer by a specified thickness, forming an insulating layer for blocking charges from moving on the control gate electrode layer and the mask layer pattern, performing anisotropic etching on the insulating layer to form an insulating layer pattern on a sidewall of the control gate electrode layer and a partial upper sidewall of the blocking layer, and performing an etching process on the blocking layer exposed by the anisotropic etching, wherein the etching process is performed as excessive etching toType: GrantFiled: December 28, 2007Date of Patent: July 19, 2011Assignee: Hynix Semiconductor Inc.Inventors: Moon Sig Joo, Seung Ho Pyi, Ki Seon Park, Heung Jae Cho, Yong Top Kim
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Patent number: 7955960Abstract: A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.Type: GrantFiled: March 21, 2008Date of Patent: June 7, 2011Assignee: Hynix Semiconductor Inc.Inventors: Se Jun Kim, Eun Seok Choi, Kyoung Hwan Park, Hyun Seung Yoo, Myung Shik Lee, Young Ok Hong, Jung Ryul Ahn, Yong Top Kim, Kyung Pil Hwang, Won Sic Woo, Jae Young Park, Ki Hong Lee, Ki Seon Park, Moon Sig Joo
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Publication number: 20090114977Abstract: Disclosed herein is a nonvolatile memory device having a charge trapping layer and a method of making the same. The nonvolatile memory device includes a substrate, a tunneling layer disposed on the substrate, a charge trapping layer disposed on the tunneling layer, a first blocking layer disposed on the charge trapping layer, a second blocking layer disposed on the first blocking layer, and a control gate electrode disposed on the second blocking layer. A first band gap between the first blocking layer and the charge trapping layer is larger than a second band gap between the second blocking layer and the charge trapping layer.Type: ApplicationFiled: June 26, 2008Publication date: May 7, 2009Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Ki Seon Park, Moon Sig Joo, Yong Top Kim, Jae Young Park, Ki Hong Lee
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Publication number: 20090108334Abstract: A charge trapping device includes a plurality of isolation layers, a plurality of charge trapping layers, a blocking layer, and a control gate electrode. The isolation layers define active regions, and the isolation layers and active regions extend as respective stripes along a first direction on a semiconductor substrate. The charge trapping layers are disposed on the active regions in island forms where the charge trapping layers are separated from each other in the first direction and disposed on the respective active regions between the isolation layers in a second direction perpendicular to the first direction. The blocking layer is disposed on the isolation layers and the charge trapping layers. The control gate electrode is disposed on the charge trapping layer.Type: ApplicationFiled: June 30, 2008Publication date: April 30, 2009Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Moon Sig Joo, Seung Ho Pyi, Ki Seon Park, Yong Top Kim, Jae Young Park, Ki Hong Lee
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Publication number: 20090108332Abstract: Disclosed herein are a non-volatile memory device and a method of manufacturing the same. The non-volatile memory device includes a substrate, a tunneling layer disposed on the substrate, a charge trapping layer disposed on the tunneling layer, a blocking layer disposed on the charge trapping layer, and a control gate electrode disposed on the blocking layer. The blocking layer in contact with the charge trapping layer includes an aluminum nitride layer.Type: ApplicationFiled: June 27, 2008Publication date: April 30, 2009Applicant: Hynix Semiconductor Inc.Inventors: Moon Sig Joo, Ki Seon Park, Yong Top Kim, Jae Young Park, Ki Hong Lee
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Publication number: 20090004802Abstract: A method of fabricating a non-volatile memory device having a charge trapping layer includes forming a tunneling layer, a charge trapping layer, a blocking layer and a control gate electrode layer over a substrate, forming a mask layer pattern on the control gate electrode layer, performing an etching process using the mask layer pattern as an etching mask to remove an exposed portion of the control gate electrode layer, wherein the etching process is performed as excessive etching to remove the charge trapping layer by a specified thickness, forming an insulating layer for blocking charges from moving on the control gate electrode layer and the mask layer pattern, performing anisotropic etching on the insulating layer to form an insulating layer pattern on a sidewall of the control gate electrode layer and a partial upper sidewall of the blocking layer, and performing an etching process on the blocking layer exposed by the anisotropic etching, wherein the etching process is performed as excessive etching toType: ApplicationFiled: December 28, 2007Publication date: January 1, 2009Inventors: Moon Sig Joo, Seung Ho Pyi, Ki Seon Park, Heung Jae Cho, Yong Top Kim
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Publication number: 20080272424Abstract: Disclosed herein is a nonvolatile memory device that includes a substrate, a tunneling layer over the substrate, a charge trapping layer over the tunneling layer, an insulating layer for improving retention characteristics over the charge trapping layer, a blocking layer over the insulating layer, and a control gate electrode over the blocking layer. Also disclosed herein is a method of making the device.Type: ApplicationFiled: November 15, 2007Publication date: November 6, 2008Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Yong Top Kim, Hong Seon Yang, Tae Yoon Kim, Yong Soo Kim, Seung Ryong Lee, Moon Sig Joo
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Publication number: 20080230830Abstract: A nonvolatile memory device and a method of fabricating the same is provided to prevent charges stored in a charge trap layer from moving to neighboring memory cells. The method of fabricating a nonvolatile memory device, includes forming a first dielectric layer on a semiconductor substrate in which active regions are defined by isolation layers, forming a charge trap layer on the first dielectric layer, removing the first dielectric layer and the charge trap layer over the isolation layers, forming a second dielectric layer on the isolation layers including the charge trap layer, and forming a conductive layer on the second dielectric layer.Type: ApplicationFiled: March 21, 2008Publication date: September 25, 2008Applicant: HYNIX SEMICONDUCTOR INC.Inventors: Se Jun KIM, Eun Seok CHOI, Kyoung Hwan PARK, Hyun Seung YOO, Myung Shik LEE, Young Ok HONG, Jung Ryul AHN, Yong Top KIM, Kyung Pil HWANG, Won Sic WOO, Jae Young PARK, Ki Hong LEE, Ki Seon PARK, Moon Sig JOO
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Publication number: 20080093661Abstract: A non-volatile memory device comprises a substrate, a tunneling layer over the substrate, a charge trapping layer comprising a stoichiometric silicon nitride layer and a silicon-rich silicon nitride layer over the tunneling layer, a blocking layer over the charge trapping layer, and a control gate electrode over the blocking layer.Type: ApplicationFiled: June 28, 2007Publication date: April 24, 2008Applicant: Hynix Semiconductor Inc.Inventors: Moon Sig Joo, Hong Seon Yang, Jae Chul Om, Seung Ho Pyi, Seung Ryong Lee, Yong Top Kim