Abstract: A circuit and method to reduce jitter and/or noise in a phase-locked loop (PLL). A voltage-controlled oscillator (VCO) control signal is tapped and filtered to create a low-noise, filtered VCO control signal. The filtered and unfiltered control signals are individually weighted and then combined to create a modified VCO control signal which reduces the jitter and/or the noise by reducing an effect of VCO gain on the jitter and/or the noise.

Abstract: Methods and systems for tuning an oscillator are disclosed and may comprise dividing a desired frequency range of a delay-cell based ring oscillator into segments, and tuning the delay-cell based ring oscillator over an ultra-wide frequency range by utilizing these divided segments. The enabled segment may determine the frequency range and the oscillator may be tuned within these segments. The delay may be adjusted utilizing a negative skew technique, and may be controlled by one or more digital codes. The oscillating frequency within each segment may be adjusted utilizing a control voltage or control current. The voltage or current may be buffered and utilized as a common supply of the delay cells.

Abstract: Methods and systems for tuning an oscillator are disclosed and may comprise dividing a desired frequency range of a delay-cell based ring oscillator into segments, and tuning the delay-cell based ring oscillator over an ultra-wide frequency range by utilizing these divided segments. The enabled segment may determine the frequency range and the oscillator may be tuned within these segments. The delay may be adjusted utilizing a negative skew technique, and may be controlled by one or more digital codes. The oscillating frequency within each segment may be adjusted utilizing a control voltage or control current. The voltage or current may be buffered and utilized as a common supply of the delay cells.

Abstract: A circuit and method to reduce jitter and/or noise in a phase-locked loop (PLL). A voltage-controlled oscillator (VCO) control signal is tapped and filtered to create a low-noise, filtered VCO control signal. The filtered and unfiltered control signals are individually weighted and then combined to create a modified VCO control signal which reduces the jitter and/or the noise by reducing an effect of VCO gain on the jitter and/or the noise.

Abstract: A wide gain range current digital-to-analog converter (DAC) is presented that includes a unit current cell having a current source module biased by a current source voltage bias, a differential switch module, a main cascode module biased by a first bias voltage and an attenuation cascode module biased by a second bias voltage, configured such that a particular current gain range is obtained at the main cascode module output when a unit current cell current is at or above a current threshold. The output current at the attenuation cascode module output can be input into a current attenuator when the unit current cell current is below the current threshold to obtain additional current gain range. The current attenuator can include a plurality of attenuator cells that can be programmed to a desired level of current gain in linear decibels or linear step intervals. Smaller step sizes can be obtained by programming a current source within the step intervals.