Patents by Inventor Yongjun J. Hu
Yongjun J. Hu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11984382Abstract: Methods, systems, and devices related to a memory device with a thermal barrier are described. The thermal barrier (e.g., a low density thermal barrier) may be positioned between an access line (e.g., a digit line or a word line) and a cell component. The thermal barrier may be formed on the surface of a barrier material by applying a plasma treatment to the barrier material. The thermal barrier may have a lower density than the barrier material and may be configured to thermally insulate the cell component from thermal energy generated in the memory device, among other benefits.Type: GrantFiled: October 1, 2021Date of Patent: May 14, 2024Assignee: Micron Technology, Inc.Inventors: Pengyuan Zheng, David Ross Economy, Yongjun J. Hu, Kent H. Zhuang, Robert K. Grubbs
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Publication number: 20240071931Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers above a conductor tier. Strings of memory cells comprising channel-material strings extend through the insulative tiers and the conductive tiers. The conductor tier comprises upper conductor material directly above and directly against lower conductor material of different composition from that of the upper conductor material. A through-array-via (TAV) region is included and comprises TAVs individually comprising the upper conductor material, the lower conductor material, and a conducting material that is directly below the conductor tier.Type: ApplicationFiled: August 31, 2022Publication date: February 29, 2024Applicant: Micron Technology, Inc.Inventors: Tom George, Rita J. Klein, Daniel Billingsley, Pengyuan Zheng, Yongjun Jeff Hu
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Publication number: 20230397423Abstract: A method of forming a microelectronic device includes forming conductive interconnect structures vertically extending through isolation material to conductive contact structures coupled to pillar structures, forming a metal silicide material on the interconnect structures and the first isolation material, forming a conductive material on the metal silicide material, and forming a dielectric material over the conductive material. The method further includes forming openings vertically extending through the dielectric material, the conductive material, the metal silicide material, and the isolation material and forming additional isolation material to extend over remaining portions of the dielectric material and at least partially fill the openings. Related devices and systems are disclosed.Type: ApplicationFiled: April 26, 2023Publication date: December 7, 2023Inventors: Pengyuan Zheng, Yongjun J. Hu, Pavan Reddy Kumar Aella, David Ross Economy, Brittany L. Kohoutek, Amritesh Rai
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Patent number: 11672191Abstract: A memory cell comprising a threshold switching material over a first electrode on a substrate. The memory cell includes a second electrode over the threshold switching material and at least one dielectric material between the threshold switching material and at least one of the first electrode and the second electrode. A memory material overlies the second electrode. The dielectric material may directly contact the threshold switching material and each of the first electrode and the second electrode. Memory cells including only one dielectric material between the threshold switching material and an electrode are disclosed. A memory device including the memory cells and methods of forming the memory cells are also described.Type: GrantFiled: January 29, 2021Date of Patent: June 6, 2023Assignee: Micron Technology, Inc.Inventors: Tsz W. Chan, D. V. Nirmal Ramaswamy, Qian Tao, Yongjun J. Hu, Everett A. McTeer
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Patent number: 11659778Abstract: Methods, systems, and devices for composite electrode material chemistry are described. A memory device may include an access line, a storage element comprising chalcogenide, and an electrode coupled with the memory element and the access line. The electrode may be made of a composition of a first material doped with a second material. The second material may include a tantalum-carbon compound. In some cases, the second may be operable to be chemically inert with the storage element. The second material may include a thermally stable electrical resistivity and a lower resistance to signals communicated between the access line and the storage element across a range of operating temperatures of the storage element as compared with a resistance of the first material.Type: GrantFiled: February 11, 2020Date of Patent: May 23, 2023Assignee: Micron Technology, Inc.Inventors: Pengyuan Zheng, Enrico Varesi, Lorenzo Fratin, Dale Collins, Yongjun J. Hu
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Publication number: 20230154856Abstract: A microelectronic device comprises a stack structure comprising insulative levels vertically interleaved with conductive levels. The conductive levels individually comprise a first conductive structure, and a second conductive structure laterally neighboring the first conductive structure, the second conductive structure exhibiting a concentration of 3-phase tungsten varying with a vertical distance from a vertically neighboring insulative level. The microelectronic device further comprises slot structures vertically extending through the stack structure and dividing the stack structure into block structures, and strings of memory cells vertically extending through the stack structure, the first conductive structures between laterally neighboring strings of memory cells, the second conductive structures between the slot structures and strings of memory cells nearest the slot structures. Related memory devices, electronic systems, and methods are also described.Type: ApplicationFiled: January 23, 2023Publication date: May 18, 2023Inventors: Jordan D. Greenlee, John D. Hopkins, Everett A. McTeer, Yiping Wang, Rajesh Balachandran, Rita J. Klein, Yongjun J. Hu
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Patent number: 11631811Abstract: Memory devices having electrode structures that increase in resistivity with thermal cycling, and associated systems and methods, are disclosed herein. In some embodiments, a memory device includes a memory element and an electrode structure electrically coupled to the memory element. The electrode structure can include a material comprising a composition of tungsten, silicon, and germanium.Type: GrantFiled: May 7, 2021Date of Patent: April 18, 2023Assignee: Micron Technology, Inc.Inventors: Pengyuan Zheng, Yongjun J. Hu
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Patent number: 11594495Abstract: A microelectronic device comprises a stack structure comprising insulative levels vertically interleaved with conductive levels. The conductive levels individually comprise a first conductive structure, and a second conductive structure laterally neighboring the first conductive structure, the second conductive structure exhibiting a concentration of ?-phase tungsten varying with a vertical distance from a vertically neighboring insulative level. The microelectronic device further comprises slot structures vertically extending through the stack structure and dividing the stack structure into block structures, and strings of memory cells vertically extending through the stack structure, the first conductive structures between laterally neighboring strings of memory cells, the second conductive structures between the slot structures and strings of memory cells nearest the slot structures. Related memory devices, electronic systems, and methods are also described.Type: GrantFiled: March 23, 2021Date of Patent: February 28, 2023Assignee: Micron Technology, Inc.Inventors: Jordan D. Greenlee, John D. Hopkins, Everett A. McTeer, Yiping Wang, Rajesh Balachandran, Rita J. Klein, Yongjun J. Hu
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Patent number: 11545623Abstract: Methods, systems, and devices for fabrication of memory cells are described. An electrode layer may have an initial thickness variation after being formed. The electrode layer may be smoothened prior to forming additional layers of a memory cell, thus decreasing the thickness variation. The subsequent layer fabricated may have a thickness variation that may be dependent on the thickness variation of the electrode layer. By decreasing the thickness variation of the electrode layer prior to forming the subsequent layer, the subsequent layer may also have a decreased thickness variation. The decreased thickness variation of the subsequent layer may impact the electrical behavior of memory cells formed from the subsequent layer. In some cases, the decreased thickness variation of the subsequent layer may allow for more predictable voltage thresholds for such memory cells, thus increasing the read windows for the memory cells.Type: GrantFiled: October 8, 2020Date of Patent: January 3, 2023Assignee: Micron Technology, Inc.Inventors: Pengyuan Zheng, Yongjun J. Hu, Yao Jin, Hongqi Li, Andrea Gotti
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Publication number: 20220415917Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.Type: ApplicationFiled: August 26, 2022Publication date: December 29, 2022Inventors: Daniel Billingsley, Matthew J. King, Jordan D. Greenlee, Yongjun J. Hu, Tom George, Amritesh Rai, Sidhartha Gupta, Kyle A. Ritter
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Patent number: 11527546Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.Type: GrantFiled: July 30, 2020Date of Patent: December 13, 2022Assignee: Micron Technology, Inc.Inventors: Daniel Billingsley, Matthew J. King, Jordan D. Greenlee, Yongjun J. Hu, Tom George, Amritesh Rai, Sidhartha Gupta, Kyle A. Ritter
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Patent number: 11527548Abstract: A semiconductor device comprises a semiconductor material extending through a stack of alternating levels of a conductive material and an insulative material, and a material comprising cerium oxide and at least another oxide adjacent to the semiconductor material. Related electronic systems and methods are also disclosed.Type: GrantFiled: December 11, 2018Date of Patent: December 13, 2022Assignee: Micron Technology, Inc.Inventors: Haoyu Li, Everett A. McTeer, Christopher W. Petz, Yongjun J. Hu
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Publication number: 20220359822Abstract: Memory devices having electrode structures that increase in resistivity with thermal cycling, and associated systems and methods, are disclosed herein. In some embodiments, a memory device includes a memory element and an electrode structure electrically coupled to the memory element. The electrode structure can include a material comprising a composition of tungsten, silicon, and germanium.Type: ApplicationFiled: May 7, 2021Publication date: November 10, 2022Inventors: Pengyuan Zheng, Yongjun J. Hu
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Publication number: 20220310522Abstract: A microelectronic device comprises a stack structure comprising insulative levels vertically interleaved with conductive levels. The conductive levels individually comprise a first conductive structure, and a second conductive structure laterally neighboring the first conductive structure, the second conductive structure exhibiting a concentration of ?-phase tungsten varying with a vertical distance from a vertically neighboring insulative level. The microelectronic device further comprises slot structures vertically extending through the stack structure and dividing the stack structure into block structures, and strings of memory cells vertically extending through the stack structure, the first conductive structures between laterally neighboring strings of memory cells, the second conductive structures between the slot structures and strings of memory cells nearest the slot structures. Related memory devices, electronic systems, and methods are also described.Type: ApplicationFiled: March 23, 2021Publication date: September 29, 2022Inventors: Jordan D. Greenlee, John D. Hopkins, Everett A. McTeer, Yiping Wang, Rajesh Balachandran, Rita J. Klein, Yongjun J. Hu
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Publication number: 20220037350Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.Type: ApplicationFiled: July 30, 2020Publication date: February 3, 2022Inventors: Daniel Billingsley, Matthew J. King, Jordan D. Greenlee, Yongjun J. Hu, Tom George, Amritesh Rai, Sidhartha Gupta, Kyle A. Ritter
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Publication number: 20220020662Abstract: Methods, systems, and devices related to a memory device with a thermal barrier are described. The thermal barrier (e.g., a low density thermal barrier) may be positioned between an access line (e.g., a digit line or a word line) and a cell component. The thermal barrier may be formed on the surface of a barrier material by applying a plasma treatment to the barrier material. The thermal barrier may have a lower density than the barrier material and may be configured to thermally insulate the cell component from thermal energy generated in the memory device, among other benefits.Type: ApplicationFiled: October 1, 2021Publication date: January 20, 2022Inventors: Pengyuan Zheng, David Ross Economy, Yongjun J. Hu, Kent H. Zhuang, Robert K. Grubbs
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Publication number: 20210375670Abstract: An apparatus comprises a structure including an upper insulating material overlying a lower insulating material, a conductive element underlying the lower insulating material, and a conductive material comprising a metal line and a contact. The conductive material extends from an upper surface of the upper insulating material to an upper surface of the conductive element. The structure also comprises a liner material adjacent the metal line. A width of an uppermost surface of the conductive material of the metal line external to the contact is relatively less than a width of an uppermost surface of the conductive material of the contact. Related methods, memory devices, and electronic systems are disclosed.Type: ApplicationFiled: August 12, 2021Publication date: December 2, 2021Inventors: Xiaosong Zhang, Yongjun J. Hu, David A. Kewley, Md Zahid Hossain, Michael J. Irwin, Daniel Billingsley, Suresh Ramarajan, Robert J. Hanson, Biow Hiem Ong, Keen Wah Chow
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Patent number: 11158561Abstract: Methods, systems, and devices related to a memory device with a thermal barrier are described. The thermal barrier (e.g., a low density thermal barrier) may be positioned between an access line (e.g., a digit line or a word line) and a cell component. The thermal barrier may be formed on the surface of a barrier material by applying a plasma treatment to the barrier material. The thermal barrier may have a lower density than the barrier material and may be configured to thermally insulate the cell component from thermal energy generated in the memory device, among other benefits.Type: GrantFiled: May 1, 2019Date of Patent: October 26, 2021Inventors: Pengyuan Zheng, David Ross Economy, Yongjun J. Hu, Kent H. Zhuang, Robert K. Grubbs
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Patent number: 11127745Abstract: A method of forming an apparatus comprises forming a first metal nitride material over an upper surface of a conductive material within an opening extending through at least one dielectric material through a non-conformal deposition process. A second metal nitride material is formed over an upper surface of the first metal nitride material and side surfaces of the at least one dielectric material partially defining boundaries of the opening through a conformal deposition process. A conductive structure is formed over surfaces of the second metal nitride material within the opening. Apparatuses and electronic systems are also described.Type: GrantFiled: June 19, 2020Date of Patent: September 21, 2021Assignee: Micron Technology, Inc.Inventors: Kentaro Ishii, Yongjun J. Hu, Amirhasan Nourbakhsh, Durai Vishak Nirmal Ramaswamy, Christopher W. Petz, Luca Fumagalli
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Patent number: 11101171Abstract: An apparatus comprises a structure including an upper insulating material overlying a lower insulating material, a conductive element underlying the lower insulating material, and a conductive material comprising a metal line and a contact. The conductive material extends from an upper surface of the upper insulating material to an upper surface of the conductive element. The structure also comprises a liner material adjacent the metal line. A width of an uppermost surface of the conductive material of the metal line external to the contact is relatively less than a width of an uppermost surface of the conductive material of the contact. Related methods, memory devices, and electronic systems are disclosed.Type: GrantFiled: August 16, 2019Date of Patent: August 24, 2021Assignee: Micron Technology, Inc.Inventors: Xiaosong Zhang, Yongjun J. Hu, David A. Kewley, Md Zahid Hossain, Michael J. Irwin, Daniel Billingsley, Suresh Ramarajan, Robert J. Hanson, Biow Hiem Ong, Keen Wah Chow