Patents by Inventor Yoong Oh
Yoong Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140027156Abstract: Disclosed herein is a method of manufacturing a multilayer type coreless substrate, the method including: (A) preparing a carrier substrate including at least one copper foil formed on one surface or both surfaces of an insulating surface; (B) forming a coreless printed circuit precursor on one surface or both surfaces of the carrier substrate; (C) separating the carrier substrate; (D) performing a polishing cutting process on the coreless printed circuit precursor; and (E) laminating a plurality of other insulating layers on a flat outer surface of the coreless printed circuit precursor, the plurality of other insulating layers sequentially including other circuit layers and other pillars.Type: ApplicationFiled: October 30, 2012Publication date: January 30, 2014Applicant: Samsung Electro-Mechanics Co., LtdInventors: Ki Hwan Kim, Myung Sam Kang, Keung Jin Sohn, Yoong Oh, Da Hee Kim, Ki Young Yoo, Han Ui Lee, Sang Hyuck Oh
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Publication number: 20140014398Abstract: Disclosed herein is a coreless substrate according to a preferred embodiment of the present invention, the coreless substrate including: a first insulating layer including at least one first pillar; a plurality of insulating layers laminated in a direction of one surface or both surfaces of the first insulating layer, including at least one circuit layer and at least one another pillar connected to the circuit layer; and a plurality of outermost circuit layers contacting an outermost pillar disposed on an outermost insulating layer among the plurality of insulating layers.Type: ApplicationFiled: October 11, 2012Publication date: January 16, 2014Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Ki Hwan Kim, Myung Sam Kang, Da Hee Kim, Yoong Oh
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Publication number: 20120119358Abstract: Disclosed herein is a semiconductor package substrate including: a substrate for package having connection pads; and a solder resist layer formed on one surface or both surfaces of the substrate for package and having openings exposing the connection pads, wherein the solder resist layer includes a roughness layer formed thereon.Type: ApplicationFiled: August 31, 2011Publication date: May 17, 2012Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventor: Yoong OH
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Publication number: 20120103662Abstract: Disclosed herein are a printed circuit board including a first low-viscosity solder resist layer formed on one surface of a substrate having circuit patterns formed thereon and a second high-viscosity solder resist layer stacked on the first solder resist layer, thereby being advantageous in controlling the deviation in application thickness of solder resist (SR), while having excellent adhesion to the substrate, and a manufacturing method thereof.Type: ApplicationFiled: March 18, 2011Publication date: May 3, 2012Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Chang Bo Lee, Cheol Ho Choi, Yoong Oh
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Patent number: 8151446Abstract: An apparatus for manufacturing a printed circuit board that uses conductive bumps to interconnect layers includes: a conveyor unit, which is configured to transport a board that has the conductive bumps formed on one side; an upper roller and a lower roller, which press the board and an insulator together; an elastic coating layer, formed on a surface of the upper roller; and a cleaning device, which removes impurities from a surface of the elastic coating layer. The apparatus does not require a separate device for performing a cushioning function and a detaching function between the bumps and the rollers, and the rollers can be kept clean using a cleaning device.Type: GrantFiled: March 14, 2008Date of Patent: April 10, 2012Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jee-Soo Mok, Je-Gwang Yoo, Yoong Oh, Jong-Seok Bae, Chang-Sup Ryu
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Publication number: 20120034386Abstract: An apparatus and a method for coating are disclosed. The coating apparatus of the present invention, which include: a transporting part configured to transport a substrate; a coating part configured to coat a coating material on the substrate; and a squeegee installed to remove an excessive coating material after the substrate passes through the coating part and being moveable along a transporting path of the substrate, can carry out the coating operation and the squeegeeing operation together, thereby reducing the lead time of the coating operation of the substrate and increasing the productivity. By integrating the conventional coating device and squeegeeing device, the space required for installation can be saved, and the quality of coating can be improved because conditions for coating can be adjusted.Type: ApplicationFiled: August 2, 2011Publication date: February 9, 2012Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yoong Oh, Jong-Seok Bae
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Publication number: 20120030942Abstract: Disclosed herein is a method for manufacturing a multi-layer printed circuit board. The method for manufacturing the multi-layer printed circuit board according to an exemplary embodiment of the present invention includes manufacturing a core substrate on which circuit patterns are formed by patterning copper clads on both sides thereof; laminating insulating films on top and bottom surfaces of the core substrate; and stacking the copper clads provided with bumps on the top and bottom surfaces of the core substrate, respectively, on which the insulating films are laminated.Type: ApplicationFiled: August 8, 2011Publication date: February 9, 2012Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yoong Oh, Cheol Ho Choi
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Patent number: 7973248Abstract: A printed circuit board using paste bumps and manufacturing method thereof are disclosed.Type: GrantFiled: July 21, 2008Date of Patent: July 5, 2011Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Jee-Soo Mok, Chang-Sup Ryu, Eung-Suek Lee, Youn-Soo Seo, Hee-Bum Shin, Yoong Oh, Byung-Bae Seo, Tae-Kyoung Kim, Dong-Jin Park
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Publication number: 20110132546Abstract: Disclosed is an apparatus for manufacturing a printed circuit board. The apparatus for manufacturing the printed circuit board includes: a supplier for supplying a substrate of a sheet type; a first printer for printing paste on the substrate supplied from the supplier to thereby form preliminary bumps; a provisional dryer which is arranged on one side of the first printer and provisional-dries the preliminary bumps; a second printer which is arranged on one side of the provisional dryer to be in series to the first printer and prints paste on the preliminary bumps; a dryer which is arranged on one side of the second printer and dries and cures the preliminary bumps to thereby form bumps; and a penetrator which is arranged on one side of the dryer, and allows the bump to pass through prepreg and bonds the prepreg and the substrate together.Type: ApplicationFiled: February 23, 2010Publication date: June 9, 2011Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Yoong Oh, Dek Gin Yang
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Patent number: 7859106Abstract: A core substrate using paste bumps, the core substrate including a first paste bump board having a plurality of first paste bumps joined to a surface thereof; a second paste bump board having a plurality of second paste bumps facing the first paste bumps joined thereto; and an insulation element placed between the first paste bump board and the second paste bump board. In the core substrate, the first paste bumps and the second paste bumps are electrically interconnected.Type: GrantFiled: October 6, 2009Date of Patent: December 28, 2010Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Yoong Oh, Chang-Sup Ryu, Dong-Jin Park, Jee-Soo Mok, Byung-Bae Seo
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Publication number: 20100025092Abstract: A core substrate using paste bumps, the core substrate including a first paste bump board having a plurality of first paste bumps joined to a surface thereof; a second paste bump board having a plurality of second paste bumps facing the first paste bumps joined thereto; and an insulation element placed between the first paste bump board and the second paste bump board. In the core substrate, the first paste bumps and the second paste bumps are electrically interconnected.Type: ApplicationFiled: October 6, 2009Publication date: February 4, 2010Applicant: Samsung Electro Mechanics Co., Ltd.Inventors: Yoong Oh, Chang-Sup Ryu, Dong-Jin Park, Jee-Soo Mok, Byung-Bae Seo
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Patent number: 7622329Abstract: A core substrate and multilayer printed circuit board using paste bumps and manufacturing method thereof are disclosed. With the method of manufacturing a core substrate using paste bumps comprising: (a) aligning a pair of paste bump boards, each of which has a plurality of paste bumps joined to its surface, such that the paste bumps face each other, and (b) pressing the pair of paste bump boards together, where an insulation element is placed between the pair of paste bump boards, it is easier to implement interlayer electrical interconnection between circuit patterns, the thickness of the core substrate can readily be adjusted by adjusting the thickness of the insulation layer, the stiffness is improved as a pair of paste bump boards are pressed from the top and bottom, and high-density wiring can be formed more easily as the paste bumps are connected in pairs so that the diameters of the paste bumps formed on the paste bump boards can be reduced.Type: GrantFiled: November 21, 2006Date of Patent: November 24, 2009Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Yoong Oh, Chang-Sup Ryu, Dong-Jin Park, Jee-Soo Mok, Byung-Bae Seo
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Publication number: 20090064497Abstract: The method of manufacturing a printed circuit board using paste bumps includes perforating a core board to form at least one via hole, filling the at least one via hole by fill-plating and forming a circuit pattern on at least one surface of the core board, stacking a paste bump board on at least one surface of the core board, and forming an outer layer circuit on a surface of the paste bump board. The method provides a structurally stable all-layer IVH structure due to increased strength in the BVH's of the plated core boards and the interlayer connection area is increased between circuit patterns for improved connection reliability, and dimple coverage can be obtained.Type: ApplicationFiled: October 29, 2008Publication date: March 12, 2009Applicant: Samsung Electro-Mechanics Co.Inventors: Jee-Soo Mok, Chang-Sup Ryu, Eung-Suek Lee, Youn-Soo Seo, Hee-Bum Shin, Yoong Oh, Byung-Bae Seo, Tae-Kyoung Kim, Dong-Jin Park
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Publication number: 20090049683Abstract: An apparatus and a method for manufacturing a printed circuit board are disclosed. The apparatus for manufacturing a printed circuit board that uses conductive bumps to interconnect layers includes: a conveyor unit, which is configured to transport a board that has the conductive bumps formed on one side; an upper roller and a lower roller, which press the board and an insulator together; an elastic coating layer, formed on a surface of the upper roller; and a cleaning device, which removes impurities from a surface of the elastic coating layer. The apparatus does not require a separate device for performing a cushioning function and a detaching function between the bumps and the rollers, and the rollers can be kept clean using a cleaning device.Type: ApplicationFiled: March 14, 2008Publication date: February 26, 2009Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jee-Soo Mok, Je-Gwang Yoo, Yoong Oh, Jong-Seok Bae, Chang-Sup Ryu
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Publication number: 20080283288Abstract: A printed circuit board using paste bumps and manufacturing method thereof are disclosed.Type: ApplicationFiled: July 21, 2008Publication date: November 20, 2008Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jee-Soo Mok, Chang-Sup Ryu, Eung-Suek Lee, Youn-Soo Seo, Hee-Bum Shin, Yoong Oh, Byung-Bae Seo, Tae-Kyoung Kim, Dong-Jin Park
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Publication number: 20070120253Abstract: A core substrate and multilayer printed circuit board using paste bumps and manufacturing method thereof are disclosed. With the method of manufacturing a core substrate using paste bumps comprising: (a) aligning a pair of paste bump boards, each of which has a plurality of paste bumps joined to its surface, such that the paste bumps face each other, and (b) pressing the pair of paste bump boards together, where an insulation element is placed between the pair of paste bump boards, it is easier to implement interlayer electrical interconnection between circuit patterns, the thickness of the core substrate can readily be adjusted by adjusting the thickness of the insulation layer, the stiffness is improved as a pair of paste bump boards are pressed from the top and bottom, and high-density wiring can be formed more easily as the paste bumps are connected in pairs so that the diameters of the paste bumps formed on the paste bump boards can be reduced.Type: ApplicationFiled: November 21, 2006Publication date: May 31, 2007Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Yoong Oh, Chang-Sup Ryu, Dong-Jin Park, Jee-Soo Mok, Byung-Bae Seo
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Publication number: 20070107934Abstract: A printed circuit board using paste bumps and manufacturing method thereof are disclosed.Type: ApplicationFiled: November 13, 2006Publication date: May 17, 2007Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Jee-Soo Mok, Chang-Sup Ryu, Eung-Suek Lee, Youn-Soo Seo, Hee-Bum Shin, Yoong Oh, Byung-Bae Seo, Tae-Kyoung Kim, Dong-Jin Park
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Patent number: 7169707Abstract: Disclosed herein is a method of manufacturing a package substrate with a fine circuit pattern using anodic oxidation. By anodizing a metal core which is opened through a masking process, oxidation layers are formed in open areas of the metal core to insulate portions of circuit pattern from each other. Further, by electroplating portions provided between the oxidation layers with copper or filling conductive paste between the oxidation layers using a screen, a package substrate having a fine circuit pattern is achieved.Type: GrantFiled: December 13, 2004Date of Patent: January 30, 2007Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Duck Young Maeng, Byung Kook Sun, Tae Hoon Kim, Jee Soo Mok, Jong Suk Bae, Yoong Oh, Chang-Kyu Song, Suk-Hyeon Cho
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Publication number: 20060046485Abstract: Disclosed herein is a method of manufacturing a package substrate with a fine circuit pattern using anodic oxidation. By anodizing a metal core which is opened through a masking process, oxidation layers are formed in open areas of the metal core to insulate portions of circuit pattern from each other. Further, by electroplating portions provided between the oxidation layers with copper or filling conductive paste between the oxidation layers using a screen, a package substrate having a fine circuit pattern is achieved.Type: ApplicationFiled: December 13, 2004Publication date: March 2, 2006Applicant: Samsung Electro-Mechanics Co., Ltd.Inventors: Duck Maeng, Byung Sun, Tae Kim, Jee Mok, Jong Bae, Yoong Oh, Chang-Kyu Song, Suk-Hyeon Cho