Patents by Inventor Yoriko Tanaka
Yoriko Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240135907Abstract: An automatic performance device includes: a pattern storage part, storing a plurality of performance patterns; a performing part, performing a performance based on the performance pattern stored in the pattern storage part; an input part, inputting performance information from an input device; a rhythm detection part, detecting a rhythm from the performance information inputted by the input part; an acquisition part, acquiring from among the plurality of performance patterns stored in the pattern storage part the performance pattern corresponding to the rhythm detected by the rhythm detection part; and a switching part, switching the performance pattern being performed by the performing part to the performance pattern acquired by the acquisition part.Type: ApplicationFiled: September 3, 2023Publication date: April 25, 2024Applicant: Roland CorporationInventors: Tomoko ITO, Ikuo TANAKA, Yoriko SASAMORI, Takaaki HAGINO
-
Patent number: 7623170Abstract: An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column.Type: GrantFiled: June 17, 2005Date of Patent: November 24, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Nobuo Nakamura, Yoriko Tanaka, Yoshitaka Egawa, Shinji Ohsawa, Tadashi Sugiki, Yukio Endo
-
Patent number: 7362366Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.Type: GrantFiled: June 25, 2004Date of Patent: April 22, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Yoshitaka Egawa, Yoriko Tanaka, Shinji Ohsawa, Yukio Endo, Hiromi Kusakabe, Nagataka Tanaka
-
Patent number: 7292276Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.Type: GrantFiled: June 25, 2004Date of Patent: November 6, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Yoshitaka Egawa, Yoriko Tanaka, Shinji Ohsawa, Yukio Endo, Hiromi Kusakabe, Nagataka Tanaka
-
Publication number: 20050231619Abstract: An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column.Type: ApplicationFiled: June 17, 2005Publication date: October 20, 2005Inventors: Nobuo Nakamura, Yoriko Tanaka, Yoshitaka Egawa, Shinji Ohsawa, Tadashi Sugiki, Yukio Endo
-
Patent number: 6930722Abstract: An image pickup apparatus comprising an array of unit cells, vertical signal lines, and a control circuit. The unit cells are arranged in rows and columns. Each unit cell has a light-receiving device for receiving light and generating an electric charge corresponding to the light, a charge-accumulating section for accumulating the electric charge generated by the light-receiving device, a transfer device for transferring the electric charge from the light-receiving device to the charge-accumulating section, and a charge-limiting device for limiting the electric charge accumulated in the charge-accumulating section. The vertical signal lines extend along the columns of unit cells, respectively, each for receiving a electric data item corresponding to the electric charge accumulated in the charge-accumulating section of any unit cell of the associated column.Type: GrantFiled: June 29, 1999Date of Patent: August 16, 2005Assignee: Kabushiki Kaisha ToshibaInventors: Nobuo Nakamura, Yoriko Tanaka, Yoshitaka Egawa, Shinji Ohsawa, Tadashi Sugiki, Yukio Endo
-
Publication number: 20040233309Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.Type: ApplicationFiled: June 25, 2004Publication date: November 25, 2004Inventors: Yoshitaka Egawa, Yoriko Tanaka, Shinji Ohsawa, Yukio Endo, Hiromi Kusakabe, Nagataka Tanaka
-
Publication number: 20040233310Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.Type: ApplicationFiled: June 25, 2004Publication date: November 25, 2004Inventors: Yoshitaka Egawa, Yoriko Tanaka, Shinji Ohsawa, Yukio Endo, Hiromi Kusakabe, Nagataka Tanaka
-
Patent number: 6801256Abstract: In a CMOS image sensor, current leakage after a series of noise removing operations has been completed is suppressed in a read operation for each horizontal line, thereby suppressing image noise occurring on the output display screen of the image sensor. There are provided signal storage regions for storing the signals read from the unit cells in the same row selected in the imaging area onto vertical signal lines and horizontal select transistors for sequentially selecting and reading the signals stored in the individual signal storage regions and transferring them to read horizontal signal lines. At least in the period during which the signals are read from the signal storage regions, one of the drain and source of the transistor electrically connected to the signal path between the vertical signal line and horizontal signal line is biased in the reverse direction with respect to the substrate region. Two adjacent ones of the horizontal select transistors form a pair.Type: GrantFiled: June 1, 1999Date of Patent: October 5, 2004Assignee: Kabushiki Kaisha ToshibaInventors: Yoshitaka Egawa, Yoriko Tanaka, Shinji Ohsawa, Yukio Endo, Hiromi Kusakabe, Nagataka Tanaka
-
Patent number: 6507365Abstract: A solid-state imaging device with a variable (continuous) electronic shutter function comprises an imaging area where unit cells with photodiodes acting as pixels are arranged two-dimensionally, read lines for driving the read transistors in each pixel row, vertical selection lines for driving the vertical selection transistors in each pixel row, a vertical driving circuit for selectively driving vertical selection lines, vertical signal lines for outputting the signal from each unit cell in the pixel rows driven sequentially, and a row selection circuit for controlling the vertical driving circuit in such a manner that the vertical driving circuit drives the read transistors in each pixel row with the desired signal storage timing and signal read timing twice in that order and thereby drives the vertical selection transistors in the pixel row in synchronization with the signal read timing.Type: GrantFiled: November 30, 1999Date of Patent: January 14, 2003Assignee: Kabushiki Kaisha ToshibaInventors: Nobuo Nakamura, Yoshitaka Egawa, Shinji Ohsawa, Yukio Endo, Yoshiyuki Matsunaga, Yoriko Tanaka, Fumio Izawa, Hiroki Miura, Ryohei Miyagawa, Ikuko Inoue, Tsuyoshi Arakawa, Yoshiyuki Tomizawa, Makoto Hoshino
-
Patent number: 6037577Abstract: An amplifying solid-state image pickup device comprises an image pickup region formed by two-dimensionally arranging photosensitive cells, each of the photosensitive cells including photoelectric conversion means, signal charge storage means, signal charge ejection means, row select means, and amplification means on a semiconductor substrate, a plurality of vertical select lines arranged in the image pickup region in a row direction, vertical select means for driving the plurality of vertical select lines, a plurality of vertical signal lines arranged in the column direction to read the outputs of the amplification means, noise suppression means provided at the ends of the plurality of vertical signal lines to capture and deduct noises and signals appearing on the plurality of vertical signal lines at time differences, horizontal select lines arranged in a column direction, horizontal read means for relaying the outputs of the horizontal select lines and the noise suppression means, horizontal select means foType: GrantFiled: March 11, 1998Date of Patent: March 14, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Yoriko Tanaka, Nobuo Nakamura, Natsue Sakaguchi, Yukio Endo, Yoshiyuki Matsunaga