Patents by Inventor Yorito Kakiuchi

Yorito Kakiuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8916881
    Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: December 23, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Yanase, Shingo Masuko, Takaaki Yasumoto, Ryoichi Ohara, Yorito Kakiuchi, Takao Noda, Kenya Sano
  • Publication number: 20140283618
    Abstract: According to one embodiment, a semiconductor device includes a substrate, a semiconductor substrate, an insulating gate field-effect transistor, and a strain gauge unit. The semiconductor substrate is placed on the substrate and has first and second regions. The insulating gate field-effect transistor is provided in the first region of the semiconductor substrate. The strain gauge unit has a long metal resistor, a first insulating film and a second insulating film. The long metal resistor is provided inside of an upper surface of the semiconductor substrate in the second region of the semiconductor substrate. The first insulating film is provided between the semiconductor substrate and the metal resistor and extends up to the upper surface of the semiconductor substrate. The second insulating film is provided above the first insulating film across the metal resistor.
    Type: Application
    Filed: September 5, 2013
    Publication date: September 25, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takaaki Yasumoto, Naoko Yanase, Ryoichi Ohara, Shingo Masuko, Kenya Sano, Yorito Kakiuchi, Takao Noda, Atsuko IIda
  • Publication number: 20140014971
    Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.
    Type: Application
    Filed: September 10, 2013
    Publication date: January 16, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Naoko YANASE, Shingo MASUKO, Takaaki YASUMOTO, Ryoichi OHARA, Yorito KAKIUCHI, Takao NODA, Kenya SANO
  • Patent number: 8558244
    Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.
    Type: Grant
    Filed: February 4, 2011
    Date of Patent: October 15, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoko Yanase, Shingo Masuko, Takaaki Yasumoto, Ryoichi Ohara, Yorito Kakiuchi, Takao Noda, Kenya Sano
  • Patent number: 8227834
    Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: July 24, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu Saito, Wataru Saito, Yorito Kakiuchi, Tomohiro Nitta, Akira Yoshioka, Tetsuya Ohno, Hidetoshi Fujimoto, Takao Noda
  • Publication number: 20110309413
    Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.
    Type: Application
    Filed: August 26, 2011
    Publication date: December 22, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu SAITO, Wataru SAITO, Yorito KAKIUCHI, Tomohiro NITTA, Akira YOSHIOKA, Totsuya OHNO, Hidetoshi FUJIMOTO, Takao NODA
  • Patent number: 8030660
    Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.
    Type: Grant
    Filed: February 13, 2009
    Date of Patent: October 4, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu Saito, Wataru Saito, Yorito Kakiuchi, Tomohiro Nitta, Akira Yoshioka, Tetsuya Ohno, Hidetoshi Fujimoto, Takao Noda
  • Publication number: 20110193101
    Abstract: According to one embodiment, a semiconductor device includes a SiC layer of a first conductivity type, a SiC region of a second conductivity type, and a conductive layer of the second conductivity type. The SiC layer of the first conductivity type has a hexagonal crystal structure. The SiC region of the second conductivity type is formed in a surface of the SiC layer. The conductive layer of the second conductivity type is provided on the SiC region and is in contact with a portion of the SiC region including SiC of a cubic crystal structure.
    Type: Application
    Filed: February 4, 2011
    Publication date: August 11, 2011
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Naoko YANASE, Shingo Masuko, Takaaki Yasumoto, Ryoichi Ohara, Yorito Kakiuchi, Takao Noda, Kenya Sano
  • Patent number: 7728354
    Abstract: A semiconductor device includes: a first semiconductor layer of p-type AlxGa1-xN (0?x?1); a second semiconductor layer of n-type AlyGa1-yN (0<y<1, x<y) formed on the first semiconductor layer; a control electrode formed on the second semiconductor layer; a first main electrode connected to the first semiconductor layer and the second semiconductor layer; and a second main electrode connected to the second semiconductor layer. An interface between the first semiconductor layer and the second semiconductor layer has a surface orientation of (1-101) or (11-20).
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: June 1, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Akira Yoshioka, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta, Yorito Kakiuchi
  • Publication number: 20090200576
    Abstract: A semiconductor device includes: a first semiconductor layer including AlXGa1-XN (0?X?1); a second semiconductor layer provided on the first semiconductor layer, including AlYGa1-YN (0?Y?1, X<Y), and having a larger bandgap than the first semiconductor layer; a source electrode provided on the second semiconductor layer; a drain electrode provided on the second semiconductor layer; and a gate electrode provided on the second semiconductor layer between the source electrode and the drain electrode. A region of the second semiconductor layer below the gate electrode at a depth short of the first semiconductor layer is doped with atoms to be negatively charged in the second semiconductor layer.
    Type: Application
    Filed: February 13, 2009
    Publication date: August 13, 2009
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yasunobu Saito, Wataru Saito, Yorito Kakiuchi, Tomohiro Nitta, Akira Yoshioka, Tetsuya Ohno, Hidetoshi Fujimoto, Takao Noda
  • Patent number: 7538366
    Abstract: A nitride semiconductor device includes: a conductive substrate; a first semiconductor layer provided on the substrate; a second semiconductor layer provided on the first semiconductor layer; a third semiconductor layer on the second semiconductor layer; a first main electrode connected to the third semiconductor layer; a second main electrode connected to the third semiconductor layer; and a control electrode provided on the third semiconductor layer. The first semiconductor layer is made of AlXGa1?XN (0?X?1) of a first conductivity type. The second semiconductor layer is made of a first nitride semiconductor. The third semiconductor layer is made of a second nitride semiconductor which is undoped or of n-type and has a wider bandgap than the first nitride semiconductor.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: May 26, 2009
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Wataru Saito, Akira Yoshioka, Hidetoshi Fujimoto, Yasunobu Saito, Takao Noda, Tomohiro Nitta, Yorito Kakiuchi
  • Publication number: 20080116486
    Abstract: A semiconductor device includes: a first semiconductor layer of p-type AlxGa1-xN (0?x?1); a second semiconductor layer of n-type AlyGa1-yN (0<y<1, x<y) formed on the first semiconductor layer; a control electrode formed on the second semiconductor layer; a first main electrode connected to the first semiconductor layer and the second semiconductor layer; and a second main electrode connected to the second semiconductor layer. An interface between the first semiconductor layer and the second semiconductor layer has a surface orientation of (1-101) or (11-20).
    Type: Application
    Filed: November 14, 2007
    Publication date: May 22, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Wataru SAITO, Akira Yoshioka, Hidetoshi Fujimoto, Takao Noda, Yasunobu Saito, Tomohiro Nitta, Yorito Kakiuchi
  • Publication number: 20070254431
    Abstract: A nitride semiconductor device includes: a conductive substrate; a first semiconductor layer provided on the substrate; a second semiconductor layer provided on the first semiconductor layer; a third semiconductor layer on the second semiconductor layer; a first main electrode connected to the third semiconductor layer; a second main electrode connected to the third semiconductor layer; and a control electrode provided on the third semiconductor layer. The first semiconductor layer is made of AlXGa1?XN (0?X?1) of a first conductivity type. The second semiconductor layer is made of a first nitride semiconductor. The third semiconductor layer is made of a second nitride semiconductor which is undoped or of n-type and has a wider bandgap than the first nitride semiconductor.
    Type: Application
    Filed: April 25, 2007
    Publication date: November 1, 2007
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Wataru Saito, Akira Yoshioka, Hidetoshi Fujimoto, Yasunobu Saito, Takao Noda, Tomohiro Nitta, Yorito Kakiuchi