Patents by Inventor Yoshiaki Sano

Yoshiaki Sano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5126277
    Abstract: After doping a conductive layer made of a semiconductive material with impurites, a conductive layer with a deep trap level is formed by low temperature annealing. For forming such a conductive layer with a deep level, lattice defects are introduced into a conventional conductive layer through ion implantation and after that, only stable lattice defects, that can work as deep levels, remain by annealing at low temperature.
    Type: Grant
    Filed: June 6, 1989
    Date of Patent: June 30, 1992
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Kazuyuki Inokuchi, Yoshiaki Sano
  • Patent number: 5099941
    Abstract: A cruise control device is provided with a vehicle speed sensor for detecting the actual vehicle speed, and an electronic controller for controlling the opening of the throttle valve based on the detected vehicle speed, to bring the vehicle speed close to a target vehicle speed. The electronic controller serves to obtain a vehicle speed deviation between the target vehicle speed set by a set switch and the actual vehicle speed, select one of a P control mode, a P/D control mode and a fuzzy control mode corresponding to the magnitude of the vehicle speed deviation, and control the opening of the throttle valve. In addition to these functions, the electronic controller may additionally have the function of estimating a change in the vehicle speed provided that the current opening of the throttle valve is maintained, to obtain a correction value for the vehicle speed so that a corrected vehicle speed corrected by the correction value is used to control the opening of the throttle valve.
    Type: Grant
    Filed: May 16, 1991
    Date of Patent: March 31, 1992
    Assignee: Mitsubishi Jidosha Kogyo Kabushiki Kaisha
    Inventors: Atsuhiro Kawano, Yoshiaki Sano, Hiroshi Umeda, Takeshi Nishimura, Yasunobu Miyata, Keiji Inagaki
  • Patent number: 5036936
    Abstract: A cruise control device is provided with a vehicle speed sensor for detecting the actual vehicle speed, and an electronic controller for controlling the opening of the throttle valve based on the detected vehicle speed, to bring the vehicle speed close to a target vehicle speed. The electronic controller serves to obtain a vehicle speed deviation between the target vehicle speed set by a set switch and the actual vehicle speed, select one of a P control mode, a P/D control mode and a fuzzy control mode corresponding to the magnitude of the vehicle speed deviation, and control the opening of the throttle valve. In addition to these functions, the electronic controller may additionally have the function of estimating a change in the vehicle speed provided that the current opening of the throttle valve is maintained, to obtain a correction value for the vehicle speed so that a corrected vehicle speed corrected by the correction value is used to control the opening of the throttle valve.
    Type: Grant
    Filed: September 11, 1989
    Date of Patent: August 6, 1991
    Assignee: Mitsubishi Jidosha Kogyo Kabushiki Kaisha
    Inventors: Atsuhiro Kawano, Yoshiaki Sano, Hiroshi Umeda, Takeshi Nishimura, Yasunobu Miyata, Keiji Inagaki
  • Patent number: 4996501
    Abstract: An amplifier circuit comprises a variable gain amplifier for receiving an input signal which is to be amplified by the amplifier circuit with a variable gain. The variable gain is controlled by a control signal. The amplifier circuit also includes a constant gain amplifier for amplifying a signal outputted from the variable gain amplifier with a constant gain, and a gain control circuit responsive to a signal outputted from the constant gain amplifier so as to supply the control signal to the variable gain amplifier. The signal from the constant gain amplifier is outputted as an output signal of the amplifier circuit, and the gain control circuit generates the control signal during a time period in which a level of the output signal of the constant gain amplifier is higher than a reference level which is a predetermined value lower than a peak value of the output signal of the constant gain amplifier.
    Type: Grant
    Filed: December 19, 1988
    Date of Patent: February 26, 1991
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited
    Inventors: Yoshiaki Sano, Toshio Hanazawa, Yoshiro Yoshino
  • Patent number: 4983905
    Abstract: A constant voltage source circuit which is provided with an output transistor (Q.sub.1) for outputting a predetermined output voltage (V.sub.0) in accordance with an input voltage (V.sub.IN) and a differential amplifier (A), and is further characterized in that the circuit further comprises a reference voltage control means which monitors variations of the input voltage (V.sub.IN) and outputs a predetermined constant voltage to the differential amplifier (A) as a reference voltage when the input voltage (V.sub.IN) is higher than, a predetermined voltage level, and a voltage varied in accordance with the variation of the input voltage (V.sub.IN) is output therefrom to the differential amplifier (A) as a reference voltage when the input voltage (V.sub.IN) falls below a predetermined voltage level.
    Type: Grant
    Filed: July 5, 1989
    Date of Patent: January 8, 1991
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited, Fujitsu Ten Limited
    Inventors: Yoshiaki Sano, Toshio Hanazawa, Yasuhide Katagase, Katsuyuki Yasukouchi, Takashi Matsumoto, Susumu Fujihara
  • Patent number: 4898839
    Abstract: A method of manufacturing a semiconductor integrated circuit comprises the steps of: forming an epitaxial layer covering a semiconductor substrate and buried layers; forming isolation regions dividing the epitaxial layer into a plurality of islands; forming a lower electrode region of an MIS type capacitor in one of the islands; forming a base region of a vertical bipolar transistor simultaneously with or independently from the lower electrode in another island; depositing a thin dielectric layer of the MIS type capacitor on a portion of the lower electrode region; thereafter selectively diffusing impurities into the surface layer of the base region so as to form an emitter region of the vertical bipolar transistor; and forming an upper electrode of the MIS type capacitor on the thin dielectric layer.
    Type: Grant
    Filed: November 15, 1988
    Date of Patent: February 6, 1990
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Chikao Fujinuma, Nobuyuki Sekikawa, Teruo Tabata, Tadayoshi Takada, Yoshiaki Sano, Toshimasa Sadakata
  • Patent number: 4713354
    Abstract: In a method of manufacturing semiconductor devices wherein a III-V compound semiconductor substrate is annealed in gas atmosphere of which the gas includes an element constituting the III-V compound semiconductor substrate to reduce the dislocation density near the III-V compound semiconductor substrate surface.
    Type: Grant
    Filed: February 28, 1986
    Date of Patent: December 15, 1987
    Assignee: Oki Electric Industry Co., Ltd.
    Inventors: Takashi Egawa, Yoshiaki Sano
  • Patent number: 4577121
    Abstract: A differential circuit, such as a comparator circuit or an operational amplifier circuit, including an output-error preventing circuit having an npn transistor and a constant voltage source. The output of the differential circuit is kept at the correct value corresponding to the difference of two inputs of the differential circuit, even if one of the two inputs becomes negative.
    Type: Grant
    Filed: December 17, 1982
    Date of Patent: March 18, 1986
    Assignee: Fujitsu Limited
    Inventors: Yoshiaki Sano, Isamu Omura, Ryo Hiramatsu
  • Patent number: 4551644
    Abstract: A gate circuit for analog signals composed of field effect transistors is provided. The analog signal is switched on and off by variation of the conductance of the FETs. Distortion of the signal is a crucial problem for such circuits, which is overcome by detecting the voltages at both the source and drain sides of the switching transistor which controls the signals to be on and off, and by feeding the voltages back to the gate of the switching transistor. The inner resistance of the switching transistor when it is in the on state is reduced, and becomes symmetric at both sides of V.sub.DS0. As a result the second order distortion is greatly reduced.
    Type: Grant
    Filed: October 31, 1983
    Date of Patent: November 5, 1985
    Assignee: Fujitsu Limited
    Inventors: Eiji Nishimori, Chikara Tsuchiya, Yoshiaki Sano
  • Patent number: 4546695
    Abstract: A grille unit has a frame and a vane pivotally connected to the frame via opposing first and second shafts. The frame has first and second holes snugly receiving the first and second shafts respectively. The first shaft has a peripheral surface, the diameter of which continuously varies along the axis thereof. The second shaft has a similar peripheral surface. The varying-diameter surfaces of the first and second shafts face in opposite directions. The frame has a first inner surface which conforms to the varying-diameter surface of the first shaft to engage the latter. The frame has a second inner surface which conforms to the varying-diameter surface of the second shaft to engage the latter. A method of manufacturing the grille unit includes the steps of forming the frame from plastic, and assemblying a mold with the frame positioned within the mold.
    Type: Grant
    Filed: September 21, 1982
    Date of Patent: October 15, 1985
    Assignees: Nissan Motor Company, Limited, Nihon Plast Company, Limited
    Inventors: Toshiki Ouchi, Yoshiaki Sano
  • Patent number: 4525637
    Abstract: An integrated circuit has an input voltage-clamping function and an input current-detecting function. A voltage-clamping circuit is provided for clamping a voltage at the input signal terminal, the voltage being clamped in response to an input current greater than a first predetermined value supplied to the input terminal. A current detecting circuit is also provided for detecting whether the input current supplied to the input terminal is greater than a second predetermined value, whereby the single input terminal for signals is used for both functions, i.e., the input voltage-clamping function and the input current-detecting function.
    Type: Grant
    Filed: September 28, 1982
    Date of Patent: June 25, 1985
    Assignees: Fujitsu Limited, Nippon Kogaku K.K.
    Inventors: Yoshiaki Sano, Chikara Tsuchiya, Osamu Maida
  • Patent number: 4513252
    Abstract: An active load circuit including a current mirror circuit used for a load to a differential amplifier, an output transistor outputting the amplified signal in response to the differential input to the differential amplifier, and a constant current source. The current mirror circuit includes a pair of load transistors and a third transistor provided to improve the circuit stability and the amplification factor. The collector of the output transistor is connected to the emitter of the third transistor to further improve the circuit stability and the amplification factor.
    Type: Grant
    Filed: December 15, 1983
    Date of Patent: April 23, 1985
    Assignee: Fujitsu Limited
    Inventor: Yoshiaki Sano
  • Patent number: 4490685
    Abstract: A differential amplifier is basically comprised of first and second transistors (Q.sub.1, Q.sub.2) each having a negative resistance feedback. A current source (IP.sub.2) and a third transistor (Q.sub.3) connected in series are provided on the side of the first transistor, and a current source (IP.sub.3) and a fourth transistor (Q.sub.4) connected in series are provided on the side of the second transistor. The base and emitter of the first transistor are connected to the respective collector and base of the third transistor so that the potential at the base of the first transistor is negatively fed back to the emitter thereof. Similarly, the base and emitter of the second transistor are connected to the respective collector and base of the fourth transistor so that the potential at the base of the second transistor is negatively fed back to the emitter thereof.
    Type: Grant
    Filed: March 25, 1983
    Date of Patent: December 25, 1984
    Assignee: Fujitsu Limited
    Inventor: Yoshiaki Sano
  • Patent number: 4476426
    Abstract: A constant-current source transistor, which exhibits a constant-current characteristic corresponding to the power source voltage of a sensor and is connected to an input signal terminal of an input circuit, such as a microprocessor. A first transistor is connected so that it may supply a current from the power source of the input circuit to the constant-current source transistor, and a second transistor is connected in parallel to the constant-current source transistor. When the signal level at the input signal terminal exceeds a predetermined value, the second transistor is turned ON to effect level control so the input signal level may not become excessively high and damage the input circuit.
    Type: Grant
    Filed: June 3, 1982
    Date of Patent: October 9, 1984
    Assignees: Fujitsu Ten Limited, Fijitsu Limited
    Inventors: Satoru Kishimoto, Masaharu Atsumi, Yoshiaki Sano
  • Patent number: 4446499
    Abstract: A clamping transistor is connected to a signal input terminal of a signal processing circuit, such as a microprocessor, which operates on the output voltage from a stabilized power source circuit. When the output voltage from the stabilized power source circuit is below a predetermined value at the time of turning ON or OFF a power source switch, the clamping transistor is held in the ON state, thereby preventing the application of an input signal of a level higher than the power source voltage of the signal processing circuit, to the signal input terminal of the signal processing circuit.
    Type: Grant
    Filed: June 3, 1982
    Date of Patent: May 1, 1984
    Assignees: Fujitsu Ten Limited, Fujitsu Limited
    Inventors: Satoru Kishimoto, Masaharu Atsumi, Yoshiaki Sano
  • Patent number: 4433306
    Abstract: A BTL power amplifier comprises main and inverse amplifier units having the same constitution but producing outputs inverted from each other. A low impedance load is directly connected between the output ports of the main and inverse amplifier units. The present BTL power amplifier further comprises a first operation control circuit which activates only the main amplifier unit after the power switch is turned on, and a second operation control circuit which maintains the output port of the inverse amplifier unit in a floating state for a predetermined period of time after the activation of the main amplifier unit is begun. Thus, the present BTL power amplifier produces no pop noise when the power supply is initiated.
    Type: Grant
    Filed: July 1, 1981
    Date of Patent: February 21, 1984
    Assignee: Fujitsu Limited
    Inventors: Hideo Honda, Chikara Tsuchiya, Yoshiaki Sano, Toshio Hanazawa, Harumi Handa
  • Patent number: 4414170
    Abstract: A method of producing a ventilator grill (A) comprising a grill frame (B) and louver vanes (E) pivotally mounted thereon utilizes first, second and third mould halves.
    Type: Grant
    Filed: April 6, 1982
    Date of Patent: November 8, 1983
    Assignees: Nihon Plast Co., Ltd., Yamato Plastics Machinery Co., Ltd.
    Inventor: Yoshiaki Sano
  • Patent number: 4230980
    Abstract: A bias circuit for generating bias voltages or bias currents including first and second elements for generating a voltage corresponding to the sum of two voltage drops in a forward p-n junction; first and second transistors for generating a negative feedback current; at least one resistor for determining the value of a constant current for generating bias voltages; a negative feedback circuit; a third resistor connected in the feedback circuit, and; a starting element for supplying currents to the first and second elements and to the first and second transistors in an initial state when the power is turned on, whereby the feedback circuit operates to generate the constant current which is used for forming bias voltages.
    Type: Grant
    Filed: May 18, 1979
    Date of Patent: October 28, 1980
    Assignee: Fujitsu Limited
    Inventors: Yoshiaki Sano, Toshio Hanazawa, Hideo Honda