Patents by Inventor Yoshiaki Tsunoda

Yoshiaki Tsunoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4929563
    Abstract: A method of manufacturing a semiconductor device with overvoltage self-protection of punchthrough type comprises the following steps.(a) A step of making a recess in a P gate-base layer from its surface exposed to the top surface of a substrate. In this step, the recess is formed to such depth that a space-charge layer produced in the gate-base layer when a predetermined breakover voltage for self-protection is applied to a thyristor reaches at least the bottom of the recess, and the bottom of the recess extends close to a junction between the gate-base layer and an emitter layer.(b) A step of doping the gate-base layer with P type impurities from the bottom of the recess to gate-base layer to form a region of low impurity concentration just under the bottom of the recess. The amount (atoms/cm.sup.2) of the P type impurities is substantially equal to N.sub.D .times.
    Type: Grant
    Filed: November 18, 1988
    Date of Patent: May 29, 1990
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiaki Tsunoda, Masatoshi Kanaya
  • Patent number: 4717947
    Abstract: A semiconductor device has a main GTO thyristor section, an auxiliary GTO thyristor section and a MOS transistor section. The main GTO thyristor section is turned on and off in accordance with a gate signal supplied to its gate terminal. The auxiliary GTO thyristor section supplies an igniting signal to the gate of the main GTO thyristor in accordance with an optical signal. The MOS transistor supplies an extinguishing signal to the gate of the main GTO thyristor section in accordance with an optical signal supplied to it.
    Type: Grant
    Filed: November 27, 1984
    Date of Patent: January 5, 1988
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideo Matsuda, Yoshiaki Tsunoda, Takashi Fujiwara, Yasunori Usui
  • Patent number: 4695871
    Abstract: A light-triggered semiconductor device comprising a light-triggered semiconductor chip housed in an airtight package and a light guide connected to a light-sensitive area of the semiconductor chip, wherein that end face of the light guide which faces the semiconductor chip is chosen to have a larger diameter than the light-sensitive area formed on the main surface of the semiconductor chip, and is connected to the light-sensitive area through an elastic transparent material preliminarily fixed to the light-sensitive area.
    Type: Grant
    Filed: August 26, 1983
    Date of Patent: September 22, 1987
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yoshiaki Tsunoda, Hideo Matsuda