Abstract: To provide a transistor device, which is composed of a compound semiconductor, having a multilayer structure in which a high electron mobility transistor (HEMT) and a heterojunction bipolar transistor (HBT) are overlapped on the same substrate and epitaxial-grown thereon, wherein a band gap energy of an indium gallium phosphide layer (InGaP) included in an epitaxial layer, is set to 1.91 eV or more.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: To provide a transistor device, which is composed of a compound semiconductor, having a multilayer structure in which a high electron mobility transistor (HEMT) and a heterojunction bipolar transistor (HBT) are overlapped on the same substrate and epitaxial-grown thereon, wherein a band gap energy of an indium gallium phosphide layer (InGaP) included in an epitaxial layer, is set to 1.91 eV or more.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A nitride semiconductor epitaxial wafer includes a growth substrate including a surface for growing a nitride semiconductor thereon, a first structure layer formed on the growth substrate, a dislocation propagation direction changing layer formed on the first structure layer for changing a propagation direction of a dislocation propagated in the first structure layer into a lateral direction, a second structure layer formed on the dislocation propagation direction changing layer, and a buffer layer formed on the second structure layer for changing a propagation direction of a dislocation propagated in the second structure layer.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AlN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: A nitride semiconductor epitaxial wafer includes a growth substrate including a surface for growing a nitride semiconductor thereon, a first structure layer formed on the growth substrate, a dislocation propagation direction changing layer formed on the first structure layer for changing a propagation direction of a dislocation propagated in the first structure layer into a lateral direction, a second structure layer formed on the dislocation propagation direction changing layer, and a buffer layer formed on the second structure layer for changing a propagation direction of a dislocation propagated in the second structure layer.

Abstract: A transistor epitaxial wafer having: a substrate; an n-type collector layer, a p-type base layer and an n-type emitter layer formed on the substrate in this order; and an n-type InGaAs non-alloy layer having an n-type InGaAs nonuniform composition layer formed on the n-type emitter layer and having an nonuniform indium (In) composition, and an n-type InGaAs uniform composition layer formed on the n-type InGaAs nonuniform composition layer and having a uniform indium (In) composition. The n-type InGaAs nonuniform composition layer has a first layer doped with Si and having a low indium (In) composition, and a second layer formed on the first layer, doped with an n-type dopant except Si, and having an indium (In) composition higher than the first layer.

Abstract: A length of a partition of an intake port is set such that the ratio between the length of the partition and the distance between the centers of adjacent intake valves is not less than 0.45 nor more than 0.72. An injector is attached on the upper side of a throttle body. The angle ? at which the injector is attached is set to be not less than 42 degrees nor more than 55 degrees. The injection starting timing of the injector is set within the periods in which the intake valves are closed.

Abstract: A semiconductor epitaxial substrate includes: a single crystal substrate; an AlN layer epitaxially grown on the single crystal substrate; and a nitride semiconductor layer epitaxially grown on the AN layer, wherein an interface between the AlN layer and nitride semiconductor layer has a larger roughness than an interface between the single crystal substrate and AlN layer, and a skewness of the upper surface of the AlN layer is positive.

Abstract: An exhaust system includes a first exhaust pipe group, a first catalyst device, and a second exhaust pipe group. A first coupling pipe of the first exhaust pipe group includes spaces in communication with respective first exhaust pipes. A second coupling pipe of the second exhaust pipe group includes spaces in communication with respective second exhaust pipes. The first exhaust pipe group and the second exhaust pipe group are joined such that the respective spaces are opposed to one another, with the first catalyst device interposed therebetween.

Abstract: A transistor epitaxial wafer having: a substrate; an n-type collector layer, a p-type base layer and an n-type emitter layer formed on the substrate in this order; and an n-type InGaAs non-alloy layer having an n-type InGaAs nonuniform composition layer formed on the n-type emitter layer and having an nonuniform indium (In) composition, and an n-type InGaAs uniform composition layer formed on the n-type InGaAs nonuniform composition layer and having a uniform indium (In) composition. The n-type InGaAs nonuniform composition layer has a first layer doped with Si and having a low indium (In) composition, and a second layer formed on the first layer, doped with an n-type dopant except Si, and having an indium (In) composition higher than the first layer.

Abstract: An exhaust system includes a first exhaust pipe group, a first catalyst device, and a second exhaust pipe group. A first coupling pipe of the first exhaust pipe group includes spaces in communication with respective first exhaust pipes. A second coupling pipe of the second exhaust pipe group includes spaces in communication with respective second exhaust pipes. The first exhaust pipe group and the second exhaust pipe group are joined such that the respective spaces are opposed to one another, with the first catalyst device interposed therebetween.

Abstract: A direct cylinder injected engine in several different embodiments which are specifically illustrated as two-cycle engines but which can also be used in four-cycle engines. The fuel injector is positioned so as to minimize escape of fuel from the exhaust port in the two-cycle engine applications. In addition, multiple or extended spark plug firing is accomplished under difficult running conditions and wherein fuel vaporization may be incomplete. This will ensure complete combustion. Various control routines and strategies are disclosed that control the number or time of injection depending upon such factors as engine speed, load, speed variation, air fuel ratio variations and pressure variations.

Abstract: A number of embodiments of exhaust temperature sensors that cooperate with an exhaust control for maintaining optimum engine performance by controlling the exhaust temperature to maintain the desired pulse back effect on the exhaust system.

Abstract: An exhaust port controlling arrangement for an internal combustion engine having both main and auxiliary exhaust ports. A main control valve cooperates with the main exhaust port for varying the timing at which the exhaust port opens in response to engine speed. An on/off auxiliary control valve is positioned in a passage leading from the auxiliary exhaust port for opening and closing the flow through the auxiliary exhaust passage in response to an engine condition. Means retard the opening of the main exhaust port upon opening of the auxiliary exhaust ports to improve the power and torque curves of the engine.