Patents by Inventor Yoshihiro Hasegawa
Yoshihiro Hasegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240153773Abstract: A method for fabricating a semiconductor device is described that includes forming a base layer over a top layer of a substrate, the base layer includes a silicon based dielectric having a thickness less than or equal to 5 nm and greater than or equal to 0.5 nm; forming a photoresist layer over the base layer, the photoresist including a first side and an opposite second side; exposing a first portion of the photoresist layer to a pattern of extreme ultraviolet (EUV) radiation from the first side; exposing a second portion of the photoresist layer with a pattern of electron flux from the second side, the electron flux being directed into the photoresist layer from the base layer in response to the EUV radiation; developing the exposed photoresist layer to form a patterned photoresist layer; and transferring the pattern of the patterned photoresist layer to the base layer and the top layer.Type: ApplicationFiled: January 18, 2024Publication date: May 9, 2024Inventors: Choong-Man Lee, Soo Doo Chae, Angelique Raley, Qiaowei Lou, Toshio Hasegawa, Yoshihiro Kato
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Patent number: 11967094Abstract: To reduce the feel of incongruity in a model, provided is a detection device comprising: a texture detector that detects texture information of a target object from a first position; a position detector that detects depth information to each point in the target object from a second position different from the first position; a region detector that detects a data deficient region in which the depth information has been acquired but the texture information has not been acquired, on the basis of a detection result of the texture detector and a detection result of the position detector; and an adder that adds specific texture information to the data deficient region.Type: GrantFiled: June 17, 2021Date of Patent: April 23, 2024Assignee: NIKON CORPORATIONInventors: Satoshi Hasegawa, Yoshihiro Nakagawa, Masashi Hashimoto
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Patent number: 11915931Abstract: A method for fabricating a semiconductor device is described that includes forming a base layer over a top layer of a substrate, the base layer includes a silicon based dielectric having a thickness less than or equal to 5 nm and greater than or equal to 0.5 nm; forming a photoresist layer over the base layer, the photoresist including a first side and an opposite second side; exposing a first portion of the photoresist layer to a pattern of extreme ultraviolet (EUV) radiation from the first side; exposing a second portion of the photoresist layer with a pattern of electron flux from the second side, the electron flux being directed into the photoresist layer from the base layer in response to the EUV radiation; developing the exposed photoresist layer to form a patterned photoresist layer; and transferring the pattern of the patterned photoresist layer to the base layer and the top layer.Type: GrantFiled: August 19, 2021Date of Patent: February 27, 2024Assignee: Tokyo Electron LimitedInventors: Choong-man Lee, Soo Doo Chae, Angelique Raley, Qiaowei Lou, Toshio Hasegawa, Yoshihiro Kato
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Patent number: 11871525Abstract: A wiring board according to the present disclosure has at least a structure in which a wiring conductor layer is layered on a surface of an insulating layer containing particles of silica, and some particles of silica among the particles of silica contained in the insulating layer are partially exposed on the surface of the insulating layer. The wiring conductor layer includes a seed layer in contact with the insulating layer and a plated conductor layer formed on a surface of the seed layer. At a contact surface between the exposed portions of the particles of silica and the seed layer, an amorphous layer of silica derived from the particles of silica and an amorphous layer of metal derived from metal forming the seed layer are present.Type: GrantFiled: December 17, 2019Date of Patent: January 9, 2024Assignee: KYOCERA CORPORATIONInventor: Yoshihiro Hasegawa
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Publication number: 20220418100Abstract: A wiring substrate according to the present disclosure includes: an insulation layer disposed at an outermost layer; an electrode conductor disposed at a surface of the insulation layer with a seed layer being interposed therebetween; a nickel layer configured to cover at least one of the electrode conductors and include a contact portion that comes into contact with a surface of the seed layer; and a gold layer configured to cover the nickel layer. The nickel layer includes a plurality of gaps at the contact portion, at least a portion of the gaps includes an opening toward the contact portion, and a portion of the gold layer is disposed in at least a portion of the gaps.Type: ApplicationFiled: September 23, 2020Publication date: December 29, 2022Applicant: KYOCERA CorporationInventors: Yoshihiro HASEGAWA, Yasuhiro HIGASHIKAWA
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Publication number: 20220159844Abstract: A wiring board according to the present disclosure has at least a structure in which a wiring conductor layer is layered on a surface of an insulating layer containing particles of silica, and some particles of silica among the particles of silica contained in the insulating layer are partially exposed on the surface of the insulating layer. The wiring conductor layer includes a seed layer in contact with the insulating layer and a plated conductor layer formed on a surface of the seed layer. At a contact surface between the exposed portions of the particles of silica and the seed layer, an amorphous layer of silica derived from the particles of silica and an amorphous layer of metal derived from metal forming the seed layer are present.Type: ApplicationFiled: December 17, 2019Publication date: May 19, 2022Applicant: KYOCERA CorporationInventor: Yoshihiro HASEGAWA
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Patent number: 10085719Abstract: In a method for producing a capacitive micromachined ultrasonic transducer having a cell of a structure having a first electrode and a vibration membrane containing a second electrode provided with a cavity interposed between the first electrode and the second electrode, a first sacrificial layer is formed on the first electrode. A second sacrificial layer is formed on a portion corresponding to a part of a cavity is formed on the first sacrificial layer, and then an insulating layer configuring a part of the vibration membrane is formed on the second sacrificial layer. The second sacrificial layer is removed by etching through an opening formed in the insulating layer, and then a part of the first sacrificial layer is removed.Type: GrantFiled: June 12, 2015Date of Patent: October 2, 2018Assignee: Canon Kabushiki KaishaInventor: Yoshihiro Hasegawa
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Patent number: 9635753Abstract: A wiring board in the present invention includes an insulating layer, a via-hole penetrating from an upper surface to a lower surface of the insulating layer, a wiring formation layer, and a grounding or power supply conductor, in which the wiring formation layer is formed of a plurality of strip-shaped conductors, and an insulating resin portion filled in at least between the strip-shaped conductors, the grounding or power supply conductor is formed to partially face the strip-shaped conductors, and a relative permittivity of the insulating layer is higher than a relative permittivity of the insulating resin portion.Type: GrantFiled: May 28, 2015Date of Patent: April 25, 2017Assignee: Kyocera CorporationInventor: Yoshihiro Hasegawa
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Publication number: 20160381793Abstract: A wiring board of the present disclosure includes an insulating layer and a wiring conductor. The wiring conductor is buried in an insulating layer in such a manner as to have a top surface exposed to a surface of the insulating layer. The wiring conductor includes, at a portion buried in the insulating layer, a wiring level difference part or a wiring inclined part having a width larger than a width of the top surface.Type: ApplicationFiled: June 22, 2016Publication date: December 29, 2016Applicant: KYOCERA CorporationInventors: Masaharu YASUDA, Yoshihiro HASEGAWA
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Publication number: 20160091344Abstract: Provided is a capacitive transducer with improved reliability of sealing. The capacitive transducer includes a cell and a sealing portion. The cell includes a first electrode and a vibrating membrane having a second electrode formed to oppose the first electrode through intermediation of a cavity. An etching opening portion is formed to form the cavity by sacrifice layer etching. The sealing portion seals the etching opening portion. A gap at a periphery of the sealing portion has a height smaller than that of the cavity. In a manufacturing method therefor, in a step of forming a sacrifice layer for forming the cavity and the gap communicating to the cavity via an etching flow path, a height of the sacrifice layer in a region that is to become the gap is set to be smaller than that of the sacrifice layer in a region that is to become the cavity.Type: ApplicationFiled: May 29, 2014Publication date: March 31, 2016Applicant: CANON KABUSHIKI KAISHAInventors: Yoshihiro Hasegawa, Toshio Tomiyoshi
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Publication number: 20160001324Abstract: The present invention provides a technology for decreasing a dispersion of the performance among electromechanical transducers each having through wiring. A method for manufacturing an electromechanical transducer includes: obtaining a structure in which an insulative portion having a through hole therein is bonded onto an electroconductive substrate; filling the through hole with an electroconductive material to form a through wiring which is electrically connected with the electroconductive substrate; and using the electroconductive substrate as a first electrode, forming a plurality of vibrating membrane portions including a second electrode, which opposes to the first electrode through a plurality of gaps, on an opposite side of the first electrode to the side having the insulative portion, to thereby forming a plurality of cells.Type: ApplicationFiled: September 17, 2015Publication date: January 7, 2016Inventors: Yoshihiro Hasegawa, Yasuyoshi Takai
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Publication number: 20150366539Abstract: In a method for producing a capacitive micromachined ultrasonic transducer having a cell of a structure having a first electrode and a vibration membrane containing a second electrode provided with a cavity interposed between the first electrode and the second electrode, a first sacrificial layer is formed on the first electrode. A second sacrificial layer is formed on a portion corresponding to a part of a cavity is formed on the first sacrificial layer, and then an insulating layer configuring a part of the vibration membrane is formed on the second sacrificial layer. The second sacrificial layer is removed by etching through an opening formed in the insulating layer, and then a part of the first sacrificial layer is removed.Type: ApplicationFiled: June 12, 2015Publication date: December 24, 2015Inventor: Yoshihiro Hasegawa
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Publication number: 20150351227Abstract: A wiring board in the present invention includes an insulating layer, a via-hole penetrating from an upper surface to a lower surface of the insulating layer, a wiring formation layer, and a grounding or power supply conductor, in which the wiring formation layer is formed of a plurality of strip-shaped conductors, and an insulating resin portion filled in at least between the strip-shaped conductors, the grounding or power supply conductor is formed to partially face the strip-shaped conductors, and a relative permittivity of the insulating layer is higher than a relative permittivity of the insulating resin portion.Type: ApplicationFiled: May 28, 2015Publication date: December 3, 2015Applicant: KYOCERA CIRCUIT SOLUTIONS, INC.Inventor: Yoshihiro HASEGAWA
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Patent number: 9166502Abstract: The present invention provides a technology for decreasing a dispersion of the performance among electromechanical transducers each having through wiring. A method for manufacturing an electromechanical transducer includes: obtaining a structure in which an insulative portion having a through hole therein is bonded onto an electroconductive substrate; filling the through hole with an electroconductive material to form a through wiring which is electrically connected with the electroconductive substrate; and using the electroconductive substrate as a first electrode, forming a plurality of vibrating membrane portions including a second electrode, which opposes to the first electrode through a plurality of gaps, on an opposite side of the first electrode to the side having the insulative portion, to thereby forming a plurality of cells.Type: GrantFiled: August 16, 2012Date of Patent: October 20, 2015Assignee: CANON KABUSHIKI KAISHAInventors: Yoshihiro Hasegawa, Yasuyoshi Takai
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Publication number: 20150001987Abstract: An electromechanical transducer includes a first electromagnetic element and a second electromagnetic element, such as electrodes, disposed opposite to each other with a sealed cavity therebetween. The sealed cavity is formed by removing a sacrifice layer and then performing sealing. A sealing portion is formed by superposing a film of a hardened second sealing material that has fluidity at normal temperature on a film of a first sealing material that does not have fluidity at normal temperature.Type: ApplicationFiled: September 17, 2014Publication date: January 1, 2015Inventors: Yuichi Masaki, Yoshihiro Hasegawa
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Patent number: 8857041Abstract: An electromechanical transducer includes a first electromagnetic element and a second electromagnetic element, such as electrodes, disposed opposite to each other with a sealed cavity therebetween. The sealed cavity is formed by removing a sacrifice layer and then performing sealing. A sealing portion is formed by superposing a film of a hardened second sealing material that has fluidity at normal temperature on a film of a first sealing material that does not have fluidity at normal temperature.Type: GrantFiled: April 14, 2011Date of Patent: October 14, 2014Assignee: Canon Kabushiki KaishaInventors: Yuichi Masaki, Yoshihiro Hasegawa
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Publication number: 20130049527Abstract: The present invention provides a technology for decreasing a dispersion of the performance among electromechanical transducers each having through wiring. A method for manufacturing an electromechanical transducer includes: obtaining a structure in which an insulative portion having a through hole therein is bonded onto an electroconductive substrate; filling the through hole with an electroconductive material to form a through wiring which is electrically connected with the electroconductive substrate; and using the electroconductive substrate as a first electrode, forming a plurality of vibrating membrane portions including a second electrode, which opposes to the first electrode through a plurality of gaps, on an opposite side of the first electrode to the side having the insulative portion, to thereby forming a plurality of cells.Type: ApplicationFiled: August 16, 2012Publication date: February 28, 2013Applicant: CANON KABUSHIKI KAISHAInventors: Yoshihiro Hasegawa, Yasuyoshi Takai
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Publication number: 20110305822Abstract: This invention includes energizing an electrode in which the surface facing a cavity is exposed as one electrode for electrolytic etching and the other electrode provided at the outside and contacting an electrolytic etching solution to perform electrolytic etching of a sacrificial layer to form a cavity. Thereafter, a removal agent is introduced from an etching hole to reduce residues of the sacrificial layer due to the electrolytic etching.Type: ApplicationFiled: May 24, 2011Publication date: December 15, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Yoshihiro Hasegawa, Chienliu Chang, Yuichi Masaki
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Publication number: 20110260576Abstract: An electromechanical transducer includes a first electromagnetic element and a second electromagnetic element, such as electrodes, disposed opposite to each other with a sealed cavity therebetween. The sealed cavity is formed by removing a sacrifice layer and then performing sealing. A sealing portion is formed by superposing a film of a hardened second sealing material that has fluidity at normal temperature on a film of a first sealing material that does not have fluidity at normal temperature.Type: ApplicationFiled: April 14, 2011Publication date: October 27, 2011Applicant: CANON KABUSHIKI KAISHAInventors: Yuichi Masaki, Yoshihiro Hasegawa
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Patent number: 7981686Abstract: A method of assessing body odor using as an index an indicator material comprising an alcohol compound having a mercapto group at the 3-position represented by the following formula (2) and/or a substance that is a derivative of an alcohol compound having a mercapto group at the 3-position, wherein an atom(s) or an atom group(s) is introduced to a mercapto group and/or a hydroxyl group of an alcohol compound having a mercapto group at the 3-position represented by the formula (2):Type: GrantFiled: March 30, 2010Date of Patent: July 19, 2011Assignee: Kao CorporationInventors: Masayuki Yabuki, Yoshihiro Hasegawa, Masamoto Matsukane