Patents by Inventor Yoshihiro Oshima
Yoshihiro Oshima has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11911877Abstract: An article including an inorganic compound according to the present invention includes a porous part and a no-porous frame body surrounding the porous part in a plane direction, and includes a stress relaxation part between the porous part and the frame body.Type: GrantFiled: February 27, 2020Date of Patent: February 27, 2024Assignee: Canon Kabushiki KaishaInventors: Kanako Oshima, Nobuhiro Yasui, Hiroshi Saito, Yoshihiro Ohashi
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Patent number: 11063109Abstract: A display unit includes a first substrate, a transistor, first and second wiring layers, and an insulating film. The first substrate is provided with a display region and a peripheral region. The transistor is provided in the display region, and includes a semiconductor layer, a gate electrode facing the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and a source-drain electrode electrically coupled to the semiconductor layer. The first wiring layer is provided in the peripheral region, electrically coupled to the transistor, and disposed closer to the first substrate than the same layer as the gate electrode and the source-drain electrode. The second wiring layer is provided on the first substrate and has an electric potential different from the first wiring layer. The insulating film is provided between the second wiring layer and the first wiring layer.Type: GrantFiled: March 26, 2020Date of Patent: July 13, 2021Assignee: JOLED INC.Inventors: Atsuhito Murai, Yasuhiro Terai, Takashi Maruyama, Yoshihiro Oshima, Motohiro Toyota, Ryosuke Ebihara, Yasunobu Hiromasu
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Patent number: 10763371Abstract: A thin film transistor is provided. The thin film transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel region wherein a portion of the source and drain regions has an oxygen concentration less than the channel region. Further provided is a thin film transistor that includes an oxide semiconductor layer including a source region, a drain region, and a channel region, wherein a portion of the source and drain regions includes a dopant selected from the group consisting of aluminum, boron, gallium, indium, titanium, silicon, germanium, tin, lead, and combinations thereof.Type: GrantFiled: November 15, 2017Date of Patent: September 1, 2020Assignee: Joled Inc.Inventors: Narihiro Morosawa, Yoshihiro Oshima
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Publication number: 20200227511Abstract: A display unit includes a first substrate, a transistor, first and second wiring layers, and an insulating film. The first substrate is provided with a display region and a peripheral region. The transistor is provided in the display region, and includes a semiconductor layer, a gate electrode facing the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and a source-drain electrode electrically coupled to the semiconductor layer. The first wiring layer is provided in the peripheral region, electrically coupled to the transistor, and disposed closer to the first substrate than the same layer as the gate electrode and the source-drain electrode. The second wiring layer is provided on the first substrate and has an electric potential different from the first wiring layer. The insulating film is provided between the second wiring layer and the first wiring layer.Type: ApplicationFiled: March 26, 2020Publication date: July 16, 2020Inventors: Atsuhito MURAI, Yasuhiro TERAI, Takashi MARUYAMA, Yoshihiro OSHIMA, Motohiro TOYOTA, Ryosuke EBIHARA, Yasunobu HIROMASU
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Patent number: 10644093Abstract: A display unit includes a first substrate, a transistor, first and second wiring layers, and an insulating film. The first substrate is provided with a display region and a peripheral region. The transistor is provided in the display region, and includes a semiconductor layer, a gate electrode facing the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and a source-drain electrode electrically coupled to the semiconductor layer. The first wiring layer is provided in the peripheral region, electrically coupled to the transistor, and disposed closer to the first substrate than the same layer as the gate electrode and the source-drain electrode. The second wiring layer is provided on the first substrate and has an electric potential different from the first wiring layer. The insulating film is provided between the second wiring layer and the first wiring layer.Type: GrantFiled: August 27, 2018Date of Patent: May 5, 2020Assignee: JOLED INC.Inventors: Atsuhito Murai, Yasuhiro Terai, Takashi Maruyama, Yoshihiro Oshima, Motohiro Toyota, Ryosuke Ebihara, Yasunobu Hiromasu
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Patent number: 10607834Abstract: A method of manufacturing a semiconductor device includes forming a semiconductor film including an oxide semiconductor material, forming a gate electrode facing the semiconductor film, forming a gate insulating film between the gate electrode and the semiconductor film, the gate insulating film having a side face that is uncovered with the gate electrode; and washing the side face of the gate insulating film with use of a chemical liquid that is able to dissolve the oxide semiconductor material.Type: GrantFiled: November 13, 2018Date of Patent: March 31, 2020Assignee: JOLED INC.Inventors: Motohiro Toyota, Yoshihiro Oshima
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Publication number: 20190333758Abstract: A method of manufacturing a semiconductor device includes forming a semiconductor film including an oxide semiconductor material, forming a gate electrode facing the semiconductor film, forming a gate insulating film between the gate electrode and the semiconductor film, the gate insulating film having a side face that is uncovered with the gate electrode; and washing the side face of the gate insulating film with use of a chemical liquid that is able to dissolve the oxide semiconductor material.Type: ApplicationFiled: November 13, 2018Publication date: October 31, 2019Inventors: Motohiro TOYOTA, Yoshihiro OSHIMA
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Publication number: 20190115476Abstract: A transistor includes a gate electrode, an oxide semiconductor film, and a gate insulating film. The oxide semiconductor film includes a channel region and a low-resistance region. The channel region faces the gate electrode. The low-resistance region has a resistance value lower than a resistance value of the channel region. The gate insulating film is provided between the oxide semiconductor film and the gate electrode, and has a first surface located closer to the oxide semiconductor film and a second surface located closer to the gate electrode. The first surface of the gate insulating film has a length in a channel length direction which is greater than a maximum length of the gate electrode in the channel length direction.Type: ApplicationFiled: December 7, 2018Publication date: April 18, 2019Inventor: Yoshihiro OSHIMA
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Publication number: 20190081125Abstract: A display unit includes a first substrate, a transistor, first and second wiring layers, and an insulating film. The first substrate is provided with a display region and a peripheral region. The transistor is provided in the display region, and includes a semiconductor layer, a gate electrode facing the semiconductor layer, a gate insulating film between the gate electrode and the semiconductor layer, and a source-drain electrode electrically coupled to the semiconductor layer. The first wiring layer is provided in the peripheral region, electrically coupled to the transistor, and disposed closer to the first substrate than the same layer as the gate electrode and the source-drain electrode. The second wiring layer is provided on the first substrate and has an electric potential different from the first wiring layer. The insulating film is provided between the second wiring layer and the first wiring layer.Type: ApplicationFiled: August 27, 2018Publication date: March 14, 2019Inventors: Atsuhito MURAI, Yasuhiro TERAI, Takashi MARUYAMA, Yoshihiro OSHIMA, Motohiro TOYOTA, Ryosuke EBIHARA, Yasunobu HIROMASU
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Publication number: 20180076330Abstract: A thin film transistor is provided. The thin film transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel region wherein a portion of the source and drain regions has an oxygen concentration less than the channel region. Further provided is a thin film transistor that includes an oxide semiconductor layer including a source region, a drain region, and a channel region, wherein a portion of the source and drain regions includes a dopant selected from the group consisting of aluminum, boron, gallium, indium, titanium, silicon, germanium, tin, lead, and combinations thereof.Type: ApplicationFiled: November 15, 2017Publication date: March 15, 2018Inventors: Narihiro Morosawa, Yoshihiro Oshima
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Patent number: 9859437Abstract: A thin film transistor is provided. The thin film transistor includes an oxide semiconductor layer including a source region, a drain region, and a channel region wherein a portion of the source and drain regions has an oxygen concentration less than the channel region. Further provided is a thin film transistor that includes an oxide semiconductor layer including a source region, a drain region, and a channel region, wherein a portion of the source and drain regions includes a dopant selected from the group consisting of aluminum, boron, gallium, indium, titanium, silicon, germanium, tin, lead, and combinations thereof.Type: GrantFiled: March 22, 2011Date of Patent: January 2, 2018Assignee: Joled Inc.Inventors: Narihiro Morosawa, Yoshihiro Oshima
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Publication number: 20170125604Abstract: A transistor includes a gate electrode, an oxide semiconductor film, and a gate insulating film. The oxide semiconductor film includes a channel region and a low-resistance region. The channel region faces the gate electrode. The low-resistance region has a resistance value lower than a resistance value of the channel region. The gate insulating film is provided between the oxide semiconductor film and the gate electrode, and has a first surface located closer to the oxide semiconductor film and a second surface located closer to the gate electrode. The first surface of the gate insulating film has a length in a channel length direction which is greater than a maximum length of the gate electrode in the channel length direction.Type: ApplicationFiled: January 12, 2017Publication date: May 4, 2017Inventor: Yoshihiro OSHIMA
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Patent number: 9466655Abstract: A display unit includes: a drive substrate including a thin film transistor; a pixel section provided on the drive substrate and including a plurality of pixels, each of the pixels including a first electrode, an organic layer including a light-emitting layer, and a second electrode in this order; and a connection section provided in a peripheral region around the pixel section in the drive substrate and configured to be electrically connected to the second electrode, in which the connection section includes an oxide semiconductor layer including, in at least a portion on a surface side thereof, a low-resistance region with lower electrical resistance than that in a portion other than the low-resistance region.Type: GrantFiled: June 15, 2015Date of Patent: October 11, 2016Assignee: JOLED Inc.Inventor: Yoshihiro Oshima
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Publication number: 20160104759Abstract: A display unit includes: a drive substrate including a thin film transistor; a pixel section provided on the drive substrate and including a plurality of pixels, each of the pixels including a first electrode, an organic layer including a light-emitting layer, and a second electrode in this order; and a connection section provided in a peripheral region around the pixel section in the drive substrate and configured to be electrically connected to the second electrode, in which the connection section includes an oxide semiconductor layer including, in at least a portion on a surface side thereof, a low-resistance region with lower electrical resistance than that in a portion other than the low-resistance region.Type: ApplicationFiled: June 15, 2015Publication date: April 14, 2016Inventor: Yoshihiro Oshima
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Patent number: 9302432Abstract: A color converting member is capable of suppressing deterioration in a phosphor by a simple manufacturing process. A method of manufacturing a color converting member includes a process of molding a resin material into a shape. In the process, molding the resin material and the phosphor integrally into a shape is performed, after kneading a phosphor that converts one color light to another color light into the resin material.Type: GrantFiled: April 16, 2013Date of Patent: April 5, 2016Assignee: DEXERIALS CORPORATIONInventors: Tsubasa Tsukahara, Yasushi Ito, Naoji Nada, Yoshihiro Oshima, Hideya Chubachi
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Patent number: 9054204Abstract: There are provided a thin-film transistor suppressing influence of light and having stable characteristics, and a method of manufacturing the thin-film transistor, as well as a display unit and an electronic apparatus. The thin-film transistor includes: a gate electrode; an oxide semiconductor film having a channel region that faces the gate electrode; and a protective film covering at least the channel region and containing an aluminum lower oxide (AlXOY, where 0<Y/X<3/2) that absorbs light.Type: GrantFiled: January 10, 2013Date of Patent: June 9, 2015Assignee: Sony CorporationInventors: Yoshihiro Oshima, Takashige Fujimori, Yasunobu Hiromasu, Yasuhiro Terai
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Color converting member, method of manufacturing the same, light emitting device, and display device
Patent number: 9001288Abstract: A color converting member is capable of suppressing deterioration in a phosphor by a simple manufacturing process. A method of manufacturing a color converting member includes a process of molding a resin material into a shape. In the process, molding the resin material and the phosphor integrally into a shape is performed, after kneading a phosphor that converts one color light to another color light into the resin material.Type: GrantFiled: January 20, 2010Date of Patent: April 7, 2015Assignee: Dexerials CorporationInventors: Tsubasa Tsukahara, Yasushi Ito, Naoji Nada, Yoshihiro Oshima, Hideya Chubachi -
Patent number: 8976438Abstract: There are provided a display and an electronic unit capable of enhancing visibility. The display includes: a plurality of pixels each including a light-emission device, and having a light-transmission region in at least a part thereof; and one or more transmittance control devices capable of controlling a transmittance of incident light.Type: GrantFiled: June 11, 2012Date of Patent: March 10, 2015Assignee: Sony CorporationInventors: Toshiaki Arai, Yoshihiro Oshima
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Patent number: 8906738Abstract: Disclosed herein is a method of manufacturing a thin film transistor having a structure that a gate electrode and an oxide semiconductor layer are disposed with a gate insulating film interposed between the gate electrode and the oxide semiconductor layer, and a source/drain electrode is electrically connected to the oxide semiconductor layer, the method including: continuously depositing an aluminum oxide (Al2O3) layer as a protective film and an aluminum (Al) layer in this order on any of the source/drain electrode, the gate insulating film, and the oxide semiconductor layer by using sputtering.Type: GrantFiled: October 25, 2011Date of Patent: December 9, 2014Assignee: Sony CorporationInventors: Takahide Ishii, Yoshihiro Oshima
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Patent number: 8643801Abstract: A display device includes a substrate; a display element; a thin film transistor, and having a first semiconductor oxide film including a source region and a drain region, the first semiconductor oxide film having first low resistance areas each of whose oxygen concentration is lower than that of the channel region in parts of the source region and the drain region in a depth direction from upper surfaces thereof; a second semiconductor oxide film having a second low resistance area whose oxygen concentration is lower than that of the channel region in a part in the depth direction from the upper surface; and a high resistance film covering the thin film transistor, the second semiconductor oxide film, and the substrate, made of a metallic oxide, having a first translucent area in an area contacting the first low resistance area, and having a second translucent area.Type: GrantFiled: February 21, 2012Date of Patent: February 4, 2014Assignee: Sony CorporationInventor: Yoshihiro Oshima