Patents by Inventor Yoshihiro Toyohara
Yoshihiro Toyohara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10409519Abstract: A computer system comprises: a host computer including a host memory and a plurality of host processors; a storage apparatus; and an interface device coupled to the host computer and the storage apparatus, the interface device including a plurality of communication processors, wherein the host computer is configured to create a first logical partition, which is a destination of dedicated allocation of a first host memory area which is a partial area of the host memory, at least one of the plurality of host processors, and at least one of the plurality of communication processors.Type: GrantFiled: October 10, 2014Date of Patent: September 10, 2019Assignee: Hitachi, Ltd.Inventors: Yuusaku Kiyota, Tetsuhiro Gotou, Yoshihiro Toyohara
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Publication number: 20170277470Abstract: A computer system comprises: a host computer including a host memory and a plurality of host processors; a storage apparatus; and an interface device coupled to the host computer and the storage apparatus, the interface device including a plurality of communication processors, wherein the host computer is configured to create a first logical partition, which is a destination of dedicated allocation of a first host memory area which is a partial area of the host memory, at least one of the plurality of host processors, and at least one of the plurality of communication processors.Type: ApplicationFiled: October 10, 2014Publication date: September 28, 2017Inventors: Yuusaku KIYOTA, Tetsuhiro GOTOU, Yoshihiro TOYOHARA
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Patent number: 9740404Abstract: A control apparatus, which is configured to control a plurality of processors corresponding to a plurality of storage areas arranged at an interface for accessing the storage areas, comprises: an update unit configured to, in a case a command sequence including each command outputted to one of the storage areas is inputted, update, by each one of the processors, a load applied by a command currently being executed to the storage area corresponding to the processor; a selection unit configured to, for one command of the command sequence, based on a load applied by a command currently executed at the processor updated by the update unit, select a processor out of the processors as an allocation destination of the one command; and an output unit configured to output the one command to the processor selected by the selection unit.Type: GrantFiled: May 31, 2013Date of Patent: August 22, 2017Assignee: Hitachi, Ltd.Inventors: Yusaku Kiyota, Tetsuhiro Gotou, Yoshihiro Toyohara
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Publication number: 20160328348Abstract: This invention provides a computer that, on the basis of identifying information for virtual ports for virtual machines in logical partitions, allows per-virtual-machine access control for storage systems. Said computer, which connects to said storage systems, has the following: hardware resources including processors, physical memory, and an I/O adapter; and a first hypervisor that logically divides said hardware resources into one or more logical partitions. Upon receiving an instruction to issue an I/O command to a logical unit of a storage system from a first virtual machine in a first logical partition, the I/O adapter transmits, to said storage system, an I/O command containing first identifying information that identifies a first virtual port for the first virtual machine.Type: ApplicationFiled: January 29, 2014Publication date: November 10, 2016Applicant: HITACHI, LTD.Inventors: Tooru IBA, Yoshihiro TOYOHARA, Naoki KUBOTA, Tetsuhiro GOTOU
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Publication number: 20160018989Abstract: A control apparatus, which is configured to control a plurality of processors corresponding to a plurality of storage areas arranged at an interface for accessing the storage areas, comprises: an update unit configured to, in a case a command sequence including each command outputted to one of the storage areas is inputted, update, by each one of the processors, a load applied by a command currently being executed to the storage area corresponding to the processor; a selection unit configured to, for one command of the command sequence, based on a load applied by a command currently executed at the processor updated by the update unit, select a processor out of the processors as an allocation destination of the one command; and an output unit configured to output the one command to the processor selected by the selection unit.Type: ApplicationFiled: May 31, 2013Publication date: January 21, 2016Inventors: Yusaku KIYOTA, Tetsuhiro GOTOU, Yoshihiro TOYOHARA
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Patent number: 8607214Abstract: In a data processing system which runs a plurality of operating systems, a channel device can be shared by the plurality of operating systems. In addition, a channel device which supports port multiplexing can also be shared by a plurality of operating systems. The channel device includes a plurality of IDs each indicating that the channel device is a medium for performing input/output processing, and an input/output processing controller for assigning one operating system to each of the IDs, and controlling a data transfer independently for each ID to control a plurality of data transfers. Further, in a channel device which has a plurality of ports, an input/output processing controller is provided for assigning an operating system to each of the ports, and transferring data independently for each port to control the plurality of ports.Type: GrantFiled: September 18, 2009Date of Patent: December 10, 2013Assignee: Hitachi Ltd.Inventors: Yoshihiro Toyohara, Tetsuhiro Goto, Megumu Hasegawa, Takeshi Shigeno
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Patent number: 8312182Abstract: Data processing arrangements including a channel adaptor shared by a plurality of operating systems (OS's) for data transmission/reception, coupled to the PCI bus on a PCI bus side of the channel adapter, and including only one connecting port on an input/output (I/O) side of the channel adaptor. An input/output process is executed between each OS and the channel adaptor by using input/output process control data specifying I/O data each having an identifier. Configuration information is provided, defining the identifier of the input/output process control data which is usable by each respective OS. The channel adaptor can process a plurality of input/output process control data; and each OS uses the input/output process control data corresponding to a usable identifier and defined in the configuration information, and thereby, a plurality of OS's control input/output process control data have different identifiers relative to the channel adaptor to execute the input/output process.Type: GrantFiled: January 18, 2011Date of Patent: November 13, 2012Assignee: Hitachi, Ltd.Inventors: Yoshihiro Toyohara, Tetsuhiro Goto, Masaji Kume
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Publication number: 20110138089Abstract: A data processing system comprising a processing unit on which a control program runs, a plurality of operating systems (OS's) configured to run under control of said control program, a Peripheral Component Interchange (PCI) bus coupled to the processing unit, and a channel adaptor for data transmission/reception, wherein: the channel adaptor is coupled to the PCI bus on a PCI bus side of the channel adapter, and the channel adapter includes only one connecting port on an input/output (I/O) side of the channel adapter; an input/output process is executed between each OS and said channel adaptor by using input/output process control data specifying input/output (I/O) data each having an identifier; configuration information is provided, defining the identifier of said input/output process control data which is usable by each respective OS; said channel adaptor can process a plurality of input/output process control data; and each OS uses said input/output process control data corresponding to a usable identifiType: ApplicationFiled: January 18, 2011Publication date: June 9, 2011Inventors: Yoshihiro TOYOHARA, Tetsuhiro Goto, Masaji Kume
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Patent number: 7877526Abstract: A data processing system including a processing unit on which a control program runs, a plurality of operating systems (OS's) configured to run under control of said control program, a Peripheral Component Interchange (PCI) bus coupled to the processing unit, and a channel adaptor for data transmission/reception, wherein: the channel adaptor is coupled to the PCI bus on a PCI bus side of the channel adapter, and the channel adapter includes only one connecting port on an input/output (I/O) side of the channel adapter; an input/output process is executed between each OS and said channel adaptor by using input/output process control data specifying input/output (I/O) data, the input/output process control data being provided via a Queue Pair having a Queue Pair identifier and including a Send Queue, Receive Queue and Complete Queue; configuration information is provided, exclusively defining the Queue Pair identifier of said Queue Pair of said input/output process control data which is usable exclusively by eacType: GrantFiled: March 11, 2010Date of Patent: January 25, 2011Assignee: Hitachi, Ltd.Inventors: Yoshihiro Toyohara, Tetsuhiro Goto, Masaji Kume
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Publication number: 20100235548Abstract: A data processing system including a processing unit on which a control program runs, a plurality of operating systems (OS's) configured to run under control of said control program, a Peripheral Component Interchange (PCI) bus coupled to the processing unit, and a channel adaptor for data transmission/reception, wherein: the channel adaptor is coupled to the PCI bus on a PCI bus side of the channel adapter, and the channel adapter includes only one connecting port on an input/output (I/O) side of the channel adapter; an input/output process is executed between each OS and said channel adaptor by using input/output process control data specifying input/output (I/O) data, the input/output process control data being provided via a Queue Pair having a Queue Pair identifier and including a Send Queue, Receive Queue and Complete Queue; configuration information is provided, exclusively defining the Queue Pair identifier of said Queue Pair of said input/output process control data which is usable exclusively by eacType: ApplicationFiled: March 11, 2010Publication date: September 16, 2010Inventors: Yoshihiro TOYOHARA, Tetsuhiro Goto, Masaji Kume
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Patent number: 7680965Abstract: A channel adaptor is provided which can be shared by a plurality of operating systems (OS's) running in a data processing system, by generating an address translation table without changing input/output process control data. A plurality of OS's execute an input/output process for the channel adaptor by using input/output process control data having different identifiers, without sharing the input/output process control data for the channel adaptor by different OS's. The data processing system generates one virtual address translation table from a plurality of address translation tables generated by OS's, and the channel adaptor processes the input/output control data of OS's by using the virtual address translation table.Type: GrantFiled: September 14, 2005Date of Patent: March 16, 2010Assignee: Hitachi, Ltd.Inventors: Yoshihiro Toyohara, Tetsuhiro Goto, Masaji Kume
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Publication number: 20100011349Abstract: In a data processing system which runs a plurality of operating systems, a channel device can be shared by the plurality of operating systems. In addition, a channel device which supports port multiplexing can also be shared by a plurality of operating systems. The channel device includes a plurality of IDs each indicating that the channel device is a medium for performing input/output processing, and an input/output processing controller for assigning one operating system to each of the IDs, and controlling a data transfer independently for each ID to control a plurality of data transfers. Further, in a channel device which has a plurality of ports, an input/output processing controller is provided for assigning an operating system to each of the ports, and transferring data independently for each port to control the plurality of ports.Type: ApplicationFiled: September 18, 2009Publication date: January 14, 2010Applicant: HITACHI, LTD.Inventors: Yoshihiro Toyohara, Tetsuhiro Goto, Megumu Hasegawa, Takeshi Shigeno
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Patent number: 7610581Abstract: In a data processing system which runs a plurality of operating systems, a channel device can be shared by the plurality of operating systems. In addition, a channel device which supports port multiplexing can also be shared by a plurality of operating systems. The channel device includes a plurality of IDs each indicating that the channel device is a medium for performing input/output processing, and an input/output processing controller for assigning one operating system to each of the IDs, and controlling a data transfer independently for each ID to control a plurality of data transfers. Further, in a channel device which has a plurality of ports, an input/output processing controller is provided for assigning an operating system to each of the ports, and transferring data independently for each port to control the plurality of ports.Type: GrantFiled: January 3, 2005Date of Patent: October 27, 2009Assignee: Hitachi, Ltd.Inventors: Yoshihiro Toyohara, Tetsuhiro Goto, Megumu Hasegawa, Takeshi Shigeno
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Publication number: 20060059328Abstract: A channel adaptor is provided which can be shared by a plurality of operating systems (OS's) running in a data processing system, by generating an address translation table without changing input/output process control data. A plurality of OS's execute an input/output process for the channel adaptor by using input/output process control data having different identifiers, without sharing the input/output process control data for the channel adaptor by different OS's. The data processing system generates one virtual address translation table from a plurality of address translation tables generated by OS's, and the channel adaptor processes the input/output control data of OS's by using the virtual address translation table.Type: ApplicationFiled: September 14, 2005Publication date: March 16, 2006Inventors: Yoshihiro Toyohara, Tetsuhiro Goto, Masaji Kume
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Publication number: 20050177648Abstract: In a data processing system which runs a plurality of operating systems, a channel device can be shared by the plurality of operating systems. In addition, a channel device which supports port multiplexing can also be shared by a plurality of operating systems. The channel device includes a plurality of IDs each indicating that the channel device is a medium for performing input/output processing, and an input/output processing controller for assigning one operating system to each of the IDs, and controlling a data transfer independently for each ID to control a plurality of data transfers. Further, in a channel device which has a plurality of ports, an input/output processing controller is provided for assigning an operating system to each of the ports, and transferring data independently for each port to control the plurality of ports.Type: ApplicationFiled: January 3, 2005Publication date: August 11, 2005Inventors: Yoshihiro Toyohara, Tetsuhiro Goto, Megumu Hasegawa, Takeshi Shigeno