Patents by Inventor Yoshihiro Usami
Yoshihiro Usami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11806827Abstract: A method for manufacturing a wire saw apparatus including a wire supply reel; a long roller; wire guides; a wire winding reel; and a tension arm controlled to move within a control angle of ±A (°) set in advance and configured to apply tension to the wire, the method including the steps of: measuring a surface roughness Rmax of the long roller; measuring an angle a (°) of the tension arm at which the tension arm swings outside a range of the control angle set in advance while the wire is extending from the wire supply reel; calculating R1×2×A÷(|a|+A)=R2, where R1 (?m) represents the measured surface roughness Rmax of the long roller; and adjusting the surface roughness Rmax of the long roller to the calculated numerical value R2 or less. The method for manufacturing a wire saw apparatus can prevent the tension arm from greatly swinging outside the control range.Type: GrantFiled: February 24, 2017Date of Patent: November 7, 2023Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventor: Yoshihiro Usami
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Patent number: 10456891Abstract: A grinding wheel which includes a plurality of vitrified bonded grindstone chips arranged on an outer periphery of an annular base metal thereof, and is configured to grind a workpiece with use of the grindstone chips while rotating the annular base metal, wherein each of the vitrified bonded grindstone chips is configured in such a manner that, in a rectangular parallelepiped including a rectangular grinding surface which is placed on an opposite side of the annular base metal and grinds the workpiece and four side surfaces adjacent to grinding surface, four ridge portions each of which is provided between the side surfaces are C-chamfered, each long side of the grinding surface is arranged along the outer periphery of the annular base metal, and each of the four ridge portions is C-chamfered in a range which is ? or more of a length of each short side of the grinding surface.Type: GrantFiled: March 11, 2016Date of Patent: October 29, 2019Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventor: Yoshihiro Usami
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Patent number: 10395933Abstract: A method for manufacturing a semiconductor wafer including: slicing off a plurality of wafers from an ingot; chamfering outer peripheral portions of the plurality of sliced wafers; and performing double-side polishing to polish both surfaces of each wafer whose outer peripheral portion is held by a carrier, wherein includes performing warp direction adjustment to uniform directions of warps of the plurality of wafers in one direction after the slicing and before the chamfering, and the chamfering and the double-side polishing are performed in a state where the directions of the warps of the plurality of wafers are uniformed in one direction after the warp direction adjustment. Consequently, it is possible to provide the method for manufacturing a semiconductor wafer which can suppress degradation of flatness of the double-side polished wafers even in case of uniforming the directions of the warps of the wafers in one direction before the double-side polishing.Type: GrantFiled: July 15, 2016Date of Patent: August 27, 2019Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Yoshihiro Usami, Shiro Amagai
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Publication number: 20190105750Abstract: A method for manufacturing a wire saw apparatus including a wire supply reel; a long roller; wire guides; a wire winding reel; and a tension arm controlled to move within a control angle of ±A (°) set in advance and configured to apply tension to the wire, the method including the steps of: measuring a surface roughness Rmax of the long roller; measuring an angle a (°) of the tension arm at which the tension arm swings outside a range of the control angle set in advance while the wire is extending from the wire supply reel; calculating R1×2×A÷(|a|+A)=R2, where R1 (?m) represents the measured surface roughness Rmax of the long roller; and adjusting the surface roughness Rmax of the long roller to the calculated numerical value R2 or less. The method for manufacturing a wire saw apparatus can prevent the tension arm from greatly swinging outside the control range.Type: ApplicationFiled: February 24, 2017Publication date: April 11, 2019Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventor: Yoshihiro USAMI
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Publication number: 20180290265Abstract: A grinding wheel which includes a plurality of vitrified bonded grindstone chips arranged on an outer periphery of an annular base metal thereof, and is configured to grind a workpiece with use of the grindstone chips while rotating the annular base metal, wherein each of the vitrified bonded grindstone chips is configured in such a manner that, in a rectangular parallelepiped including a rectangular grinding surface which is placed on an opposite side of the annular base metal and grinds the workpiece and four side surfaces adjacent to grinding surface, four ridge portions each of which is provided between the side surfaces are C-chamfered, each long side of the grinding surface is arranged along the outer periphery of the annular base metal, and each of the four ridge portions is C-chamfered in a range which is ? or more of a length of each short side of the grinding surface.Type: ApplicationFiled: March 11, 2016Publication date: October 11, 2018Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventor: Yoshihiro USAMI
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Publication number: 20180226258Abstract: A method for manufacturing a semiconductor wafer including: slicing off a plurality of wafers from an ingot; chamfering outer peripheral portions of the plurality of sliced wafers; and performing double-side polishing to polish both surfaces of each wafer whose outer peripheral portion is held by a carrier, wherein includes performing warp direction adjustment to uniform directions of warps of the plurality of wafers in one direction after the slicing and before the chamfering, and the chamfering and the double-side polishing are performed in a state where the directions of the warps of the plurality of wafers are uniformed in one direction after the warp direction adjustment. Consequently, it is possible to provide the method for manufacturing a semiconductor wafer which can suppress degradation of flatness of the double-side polished wafers even in case of uniforming the directions of the warps of the wafers in one direction before the double-side polishing.Type: ApplicationFiled: July 15, 2016Publication date: August 9, 2018Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Yoshihiro USAMI, Shiro AMAGAI
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Patent number: 9962802Abstract: The present invention is a workpiece double-disc grinding method including supporting a sheet workpiece along a circumferential direction from an outer circumference side of the workpiece by a ring holder, and simultaneously grinding both surfaces of the workpiece supported by the ring holder with a pair of grinding wheels while rotating the ring holder, wherein the surfaces of the workpiece are simultaneously ground such that a wear amount of the grinding wheels per 1 ?m of a grinding stock removal of the workpiece ranges from 0.10 ?m to 0.33 ?m. This workpiece double-disc grinding method can reduce nanotopography formed in previous steps such as a slicing step without degrading the flatness in the double-disc grinding step.Type: GrantFiled: January 23, 2015Date of Patent: May 8, 2018Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventor: Yoshihiro Usami
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Patent number: 9748089Abstract: A method for producing mirror-polished wafer, the method produces a plurality of mirror-polished wafers by performing, on plurality of silicon wafers obtained by slicing a silicon ingot, slicing strain removing step of removing strain on a surface caused by slicing, etching step of removing strain caused by the slicing strain removing step, and double-side polishing step of performing mirror polishing on both surfaces of the silicon wafers subjected to etching, each step being performed by batch processing, wherein silicon wafers which are processed in double-side polishing step by batch processing are selected from silicon wafers processed in same batch in the slicing strain removing step and the number of silicon wafers to be selected is made to be equal to the number of silicon wafers processed in the slicing strain removing step or submultiple thereof. As a result, a method that can produce mirror-polished wafers having high flatness is provided.Type: GrantFiled: August 20, 2014Date of Patent: August 29, 2017Assignee: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Hiromasa Hashimoto, Yoshihiro Usami, Kazuaki Aoki, Shigeru Oba
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Publication number: 20170136596Abstract: The present invention is a workpiece double-disc grinding method including supporting a sheet workpiece along a circumferential direction from an outer circumference side of the workpiece by a ring holder, and simultaneously grinding both surfaces of the workpiece supported by the ring holder with a pair of grinding wheels while rotating the ring holder, wherein the surfaces of the workpiece are simultaneously ground such that a wear amount of the grinding wheels per 1 ?m of a grinding stock removal of the workpiece ranges from 0.10 ?m to 0.33 ?m. This workpiece double-disc grinding method can reduce nanotopography formed in previous steps such as a slicing step without degrading the flatness in the double-disc grinding step.Type: ApplicationFiled: January 23, 2015Publication date: May 18, 2017Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventor: Yoshihiro USAMI
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Publication number: 20160217998Abstract: A method for producing mirror-polished wafer, the method produces a plurality of mirror-polished wafers by performing, on plurality of silicon wafers obtained by slicing a silicon ingot, slicing strain removing step of removing strain on a surface caused by slicing, etching step of removing strain caused by the slicing strain removing step, and double-side polishing step of performing mirror polishing on both surfaces of the silicon wafers subjected to etching, each step being performed by batch processing, wherein silicon wafers which are processed in double-side polishing step by batch processing are selected from silicon wafers processed in same batch in the slicing strain removing step and the number of silicon wafers to be selected is made to be equal to the number of silicon wafers processed in the slicing strain removing step or submultiple thereof. As a result, a method that can produce mirror-polished wafers having high flatness is provided.Type: ApplicationFiled: August 20, 2014Publication date: July 28, 2016Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Hiromasa HASHIMOTO, Yoshihiro USAMI, Kazuaki AOKI, Shigeru OBA
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Patent number: D653949Type: GrantFiled: January 7, 2011Date of Patent: February 14, 2012Assignee: Takara Shuzo Co., Ltd.Inventors: Hideki Tanaka, Yoshiharu Tsukino, Yuzuru Sakano, Yoshihiro Usami
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Patent number: D696950Type: GrantFiled: January 4, 2012Date of Patent: January 7, 2014Assignee: Takara Shuzo Co., Ltd.Inventors: Hideki Tanaka, Yoshiharu Tsukino, Yuzuru Sakano, Yoshihiro Usami
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Patent number: D696951Type: GrantFiled: January 4, 2012Date of Patent: January 7, 2014Assignee: Takara Shuzo Co., Ltd.Inventors: Hideki Tanaka, Yoshiharu Tsukino, Yuzuru Sakano, Yoshihiro Usami