Patents by Inventor Yoshikazu Hiura
Yoshikazu Hiura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240138204Abstract: A high-definition and high-resolution display apparatus is provided. A conductive film, a first layer, and a first sacrificial layer are formed. The first layer and the first sacrificial layer are processed to expose part of the conductive film. A second layer and a second sacrificial layer are formed over the first sacrificial layer and the conductive film. The second layer and the second sacrificial layer are processed to expose part of the conductive film. The conductive film is processed to form a first pixel electrode overlapping with the first sacrificial layer and a second pixel electrode overlapping with the second sacrificial layer. Two insulating films covering at least a side surface of the first pixel electrode, a side surface of the second pixel electrode, a side surface of the first layer, a side surface of the second layer, a side surface and a top surface of the first sacrificial layer, and a side surface and atop surface of the second sacrificial layer are formed.Type: ApplicationFiled: February 24, 2022Publication date: April 25, 2024Inventors: Ryota HODO, Shinya SASAGAWA, Yoshikazu HIURA, Takahiro FUJIE
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Publication number: 20240122052Abstract: A novel display panel that is highly convenient, useful, or reliable is provided. The display panel includes a first light-emitting device, a second light-emitting device, a partition, a first protective layer, and a second protective layer. The first light-emitting device includes a first electrode, a second electrode, and a first layer, and the first layer is interposed between the electrodes. The first layer includes a first material having a hole-transport property and a first substance having an electron-accepting property, and the first protective layer is in contact with the second electrode. The second light-emitting device includes a third electrode, a fourth electrode, and a second layer, and the second layer is interposed between the electrodes. The second layer includes the first material having a hole-transport property and the first substance having an electron-accepting property, and the second layer includes a first gap between the second layer and the first layer.Type: ApplicationFiled: December 15, 2021Publication date: April 11, 2024Inventors: Shinya SASAGAWA, Ryota HODO, Yoshikazu HIURA, Takahiro FUJIE
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Publication number: 20240074240Abstract: A high-resolution or high-definition display device is provided.Type: ApplicationFiled: January 18, 2022Publication date: February 29, 2024Inventors: Ryota HODO, Shinya SASAGAWA, Yoshikazu HIURA, Takahiro FUJIE, Shunpei YAMAZAKI
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Publication number: 20230200198Abstract: To provide a light-emitting element in which an organic compound layer can be processed at once by a photolithography technique. A first electrode and an organic compound layer including an electron-injection layer are formed over an insulating surface. The electron-injection layer is the outermost layer of the organic compound layer and contains an organic compound having a basic skeleton and an acid dissociation constant pKa of greater than or equal to 1. A sacrificial layer and a mask are formed over the electron-injection layer and the sacrificial layer is processed into an island shape using the mask. With use of the island-shaped sacrificial layer as a mask, the organic compound layer is processed into an island shape to cover the first electrode. Part of the island-shaped sacrificial layer is removed with an acidic chemical solution to expose the electron-injection layer. A second electrode is formed to cover the electron-injection layer.Type: ApplicationFiled: December 13, 2022Publication date: June 22, 2023Inventors: Shunpei YAMAZAKI, Sachiko KAWAKAMI, Nobuharu OHSAWA, Yuji IWAKI, Ryota HODO, Kentaro SUGAYA, Shinya SASAGAWA, Takahiro FUJIE, Yoshikazu HIURA, Toshiki SASAKI, Takeyoshi WATABE, Kunihiko SUZUKI
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Patent number: 10147747Abstract: A semiconductor device includes a first layer, a second layer over the first layer, and a third layer over the second layer. The first layer includes a first transistor. The third layer includes a second transistor. A channel formation region of the first transistor includes a single crystal semiconductor. A channel formation region of the second transistor includes an oxide semiconductor. The second layer includes a first insulating film, a second insulating film, and a conductive film. The conductive film has a function of electrically connecting the first transistor and the second transistor. The first insulating film is over and in contact with the conductive film. The second insulating film is provided over the first insulating film. The second insulating film includes a region with a carbon concentration of greater than or equal to 1.77×1017 atoms/cm3 and less than or equal to 1.0×1018 atoms/cm3.Type: GrantFiled: August 12, 2015Date of Patent: December 4, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Satoshi Toriumi, Yoshikazu Hiura, Mai Sugikawa
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Patent number: 9852850Abstract: A power storage device with high capacity is provided. Alternatively, a power storage device with excellent cycle characteristics is provided. Alternatively, a power storage device with high charge and discharge efficiency is provided. Alternatively, a power storage device with a long lifetime is provided. A negative electrode active material is provided over a negative electrode current collector, and the negative electrode active material layer is formed in such a manner that first layers and second layers are alternately stacked. The first layer includes at least an element selected from Si, Mg, Ca, Ga, Al, Ge, Sn, Pb, Sb, Bi, Ag, Zn, Cd, As, Hg, and In. The second layer includes oxygen and the same element as the one included in the first layer.Type: GrantFiled: July 17, 2015Date of Patent: December 26, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Nobuhiro Inoue, Ryota Tajima, Kazutaka Kuriki, Mitsuhiro Ichijo, Yoshikazu Hiura, Mai Sugikawa
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Patent number: 9450132Abstract: An object is to increase conversion efficiency of a photoelectric conversion device without increase in the manufacturing steps. The photoelectric conversion device includes a first semiconductor layer formed using a single crystal semiconductor having one conductivity type which is formed over a supporting substrate, a buffer layer including a single crystal region and an amorphous region, a second semiconductor layer which includes a single crystal region and an amorphous region and is provided over the butler layer, and a third semiconductor layer having a conductivity type opposite to the one conductivity type, which is provided over the second semiconductor layer. A proportion of the single crystal region is higher than that of the amorphous region on the first semiconductor layer side in the second semiconductor layer, and the proportion of the amorphous region is higher than that of the single crystal region on the third semiconductor layer side.Type: GrantFiled: October 15, 2014Date of Patent: September 20, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Sho Kato, Yoshikazu Hiura, Akihisa Shimomura, Takashi Ohtsuki, Satoshi Toriumi, Yasuyuki Arai
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Patent number: 9437768Abstract: A photoelectric conversion device with low resistance loss and high conversion efficiency is provided. The photoelectric conversion device includes a first silicon semiconductor layer and a second silicon semiconductor layer between a pair of electrodes. The first silicon semiconductor layer is provided over one surface of a crystalline silicon substrate having one conductivity type and has a conductivity type opposite to that of the crystalline silicon substrate, and the second silicon semiconductor layer is provided on the other surface of the crystalline silicon substrate and has a conductivity type which is the same as that of the crystalline silicon substrate. Further, the first silicon semiconductor layer and the second silicon semiconductor layer each have a carrier concentration varying in the film thickness direction.Type: GrantFiled: September 14, 2012Date of Patent: September 6, 2016Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoichiro Numasawa, Yasushi Maeda, Yoshikazu Hiura, Shunpei Yamazaki
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Publication number: 20160056179Abstract: A semiconductor device includes a first layer, a second layer over the first layer, and a third layer over the second layer. The first layer includes a first transistor. The third layer includes a second transistor. A channel formation region of the first transistor includes a single crystal semiconductor. A channel formation region of the second transistor includes an oxide semiconductor. The second layer includes a first insulating film, a second insulating film, and a conductive film. The conductive film has a function of electrically connecting the first transistor and the second transistor. The first insulating film is over and in contact with the conductive film. The second insulating film is provided over the first insulating film. The second insulating film includes a region with a carbon concentration of greater than or equal to 1.77×1017 atoms/cm3 and less than or equal to 1.0×1018 atoms/cm3.Type: ApplicationFiled: August 12, 2015Publication date: February 25, 2016Inventors: Satoshi TORIUMI, Yoshikazu HIURA, Mai SUGIKAWA
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Publication number: 20160020035Abstract: A power storage device with high capacity is provided. Alternatively, a power storage device with excellent cycle characteristics is provided. Alternatively, a power storage device with high charge and discharge efficiency is provided. Alternatively, a power storage device with a long lifetime is provided. A negative electrode active material is provided over a negative electrode current collector, and the negative electrode active material layer is formed in such a manner that first layers and second layers are alternately stacked. The first layer includes at least an element selected from Si, Mg, Ca, Ga, Al, Ge, Sn, Pb, Sb, Bi, Ag, Zn, Cd, As, Hg, and In. The second layer includes oxygen and the same element as the one included in the first layer.Type: ApplicationFiled: July 17, 2015Publication date: January 21, 2016Inventors: Nobuhiro INOUE, Ryota TAJIMA, Kazutaka KURIKI, Mitsuhiro ICHIJO, Yoshikazu HIURA, Mai SUGIKAWA
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Publication number: 20150053264Abstract: An object is to increase conversion efficiency of a photoelectric conversion device without increase in the manufacturing steps. The photoelectric conversion device includes a first semiconductor layer formed using a single crystal semiconductor having one conductivity type which is formed over a supporting substrate, a buffer layer including a single crystal region and an amorphous region, a second semiconductor layer which includes a single crystal region and an amorphous region and is provided over the butler layer, and a third semiconductor layer having a conductivity type opposite to the one conductivity type, which is provided over the second semiconductor layer. A proportion of the single crystal region is higher than that of the amorphous region on the first semiconductor layer side in the second semiconductor layer, and the proportion of the amorphous region is higher than that of the single crystal region on the third semiconductor layer side.Type: ApplicationFiled: October 15, 2014Publication date: February 26, 2015Inventors: Sho KATO, Yoshikazu HIURA, Akihisa SHIMOMURA, Takashi OHTSUKI, Satoshi TORIUMI, Yasuyuki ARAI
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Patent number: 8872021Abstract: An object is to increase conversion efficiency of a photoelectric conversion device without increase in the manufacturing steps. The photoelectric conversion device includes a first semiconductor layer formed using a single crystal semiconductor having one conductivity type which is formed over a supporting substrate, a buffer layer including a single crystal region and an amorphous region, a second semiconductor layer which includes a single crystal region and an amorphous region and is provided over the buffer layer, and a third semiconductor layer having a conductivity type opposite to the one conductivity type, which is provided over the second semiconductor layer. A proportion of the single crystal region is higher than that of the amorphous region on the first semiconductor layer side in the second semiconductor layer, and the proportion of the amorphous region is higher than that of the single crystal region on the third semiconductor layer side.Type: GrantFiled: September 23, 2009Date of Patent: October 28, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Sho Kato, Yoshikazu Hiura, Akihisa Shimomura, Takashi Ohtsuki, Satoshi Toriumi, Yasuyuki Arai
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Patent number: 8513046Abstract: A photoelectric conversion device including a single crystal silicon substrate; a first amorphous silicon layer in contact with a surface (a light-receiving surface) of the single crystal silicon substrate; a first polarity (p-type) impurity diffusion layer in contact with the first amorphous silicon layer; a second amorphous silicon layer in contact with a back surface of the single crystal silicon substrate; and a second polarity (n-type) impurity diffusion layer in contact with the second amorphous silicon layer, in which the first and second polarity impurity diffusion layers are microcrystalline silicon layers formed under a deposition condition where a pressure in a reaction chamber is adjusted to be greater than or equal to 450 Pa and less than or equal to 10000 Pa is provided.Type: GrantFiled: October 4, 2011Date of Patent: August 20, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshikazu Hiura, Fumito Isaka
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Patent number: 8481370Abstract: The present invention provides a semiconductor device having a structure that can be mounted on a wiring substrate, as for the semiconductor device formed over a thin film-thickness substrate, a film-shaped substrate, or a sheet-like substrate. In addition, the present invention provides a method for manufacturing a semiconductor device that is capable of raising a reliability of mounting on a wiring substrate. One feature of the present invention is to bond a semiconductor element formed on a substrate having isolation to a member that a conductive film is formed via a medium having an anisotropic conductivity.Type: GrantFiled: August 3, 2006Date of Patent: July 9, 2013Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Kazuo Nishi, Hiroki Adachi, Naoto Kusumoto, Yuusuke Sugawara, Hidekazu Takahashi, Daiki Yamada, Yoshikazu Hiura
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Publication number: 20130082344Abstract: A photoelectric conversion device with low resistance loss and high conversion efficiency is provided. The photoelectric conversion device includes a first silicon semiconductor layer and a second silicon semiconductor layer between a pair of electrodes. The first silicon semiconductor layer is provided over one surface of a crystalline silicon substrate having one conductivity type and has a conductivity type opposite to that of the crystalline silicon substrate, and the second silicon semiconductor layer is provided on the other surface of the crystalline silicon substrate and has a conductivity type which is the same as that of the crystalline silicon substrate. Further, the first silicon semiconductor layer and the second silicon semiconductor layer each have a carrier concentration varying in the film thickness direction.Type: ApplicationFiled: September 14, 2012Publication date: April 4, 2013Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoichiro Nuwasawa, Yasushi Maeda, Yoshikazu Hiura, Shunpei Yamazaki
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Patent number: 8207011Abstract: Provided is a technique for manufacturing a photoelectric conversion element using a dense crystalline semiconductor film without a cavity between crystal grains.Type: GrantFiled: August 20, 2010Date of Patent: June 26, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshikazu Hiura, Riho Kataishi, Shunpei Yamazaki
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Patent number: 8192545Abstract: The present invention relates to a film formation apparatus including a first transfer chamber having a roller for sending a substrate, a film formation chamber having a discharging electrode, a buffer chamber provided between the transfer chamber and the film formation chamber or between the film formation chambers, a slit provided in a portion where the substrate comes in and out in the buffer chamber, and a second transfer chamber having a roller for rewinding the substrate. The slit is provided with at least one touch roller, and the touch roller is in contact with a film formation surface of the substrate. In addition, the present invention also relates to a method for forming a film and a method for manufacturing a photoelectric conversion device that are performed by using such a film formation apparatus.Type: GrantFiled: June 7, 2011Date of Patent: June 5, 2012Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshikazu Hiura, Hiroki Adachi, Hironobu Takahashi, Yuusuke Sugawara, Tatsuya Arao, Kazuo Nishi, Yasuyuki Arai
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Publication number: 20120086005Abstract: A photoelectric conversion device including a single crystal silicon substrate; a first amorphous silicon layer in contact with a surface (a light-receiving surface) of the single crystal silicon substrate; a first polarity (p-type) impurity diffusion layer in contact with the first amorphous silicon layer; a second amorphous silicon layer in contact with a back surface of the single crystal silicon substrate; and a second polarity (n-type) impurity diffusion layer in contact with the second amorphous silicon layer, in which the first and second polarity impurity diffusion layers are microcrystalline silicon layers formed under a deposition condition where a pressure in a reaction chamber is adjusted to be greater than or equal to 450 Pa and less than or equal to 10000 Pa is provided.Type: ApplicationFiled: October 4, 2011Publication date: April 12, 2012Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshikazu HIURA, Fumito Isaka
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Publication number: 20110232571Abstract: The present invention relates to a film formation apparatus including a first transfer chamber having a roller for sending a substrate, a film formation chamber having a discharging electrode, a buffer chamber provided between the transfer chamber and the film formation chamber or between the film formation chambers, a slit provided in a portion where the substrate comes in and out in the buffer chamber, and a second transfer chamber having a roller for rewinding the substrate. The slit is provided with at least one touch roller, and the touch roller is in contact with a film formation surface of the substrate. In addition, the present invention also relates to a method for forming a film and a method for manufacturing a photoelectric conversion device that are performed by using such a film formation apparatus.Type: ApplicationFiled: June 7, 2011Publication date: September 29, 2011Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Yoshikazu HIURA, Hiroki ADACHI, Hironobu TAKAHASHI, Yuusuke SUGAWARA, Tatsuya ARAO, Kazuo NISHI, Yasuyuki ARAI
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Patent number: 7985664Abstract: The present invention relates to a film formation apparatus including a first transfer chamber having a roller for sending a substrate, a film formation chamber having a discharging electrode, a buffer chamber provided between the transfer chamber and the film formation chamber or between the film formation chambers, a slit provided in a portion where the substrate comes in and out in the buffer chamber, and a second transfer chamber having a roller for rewinding the substrate. The slit is provided with at least one touch roller, and the touch roller is in contact with a film formation surface of the substrate. In addition, the present invention also relates to a method for forming a film and a method for manufacturing a photoelectric conversion device that are performed by using such a film formation apparatus.Type: GrantFiled: November 30, 2009Date of Patent: July 26, 2011Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshikazu Hiura, Hiroki Adachi, Hironobu Takahashi, Yuusuke Sugawara, Tatsuya Arao, Kazuo Nishi, Yasuyuki Arai