Patents by Inventor Yoshikazu Saitoh
Yoshikazu Saitoh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9530485Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: GrantFiled: August 14, 2015Date of Patent: December 27, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Publication number: 20150357026Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: ApplicationFiled: August 14, 2015Publication date: December 10, 2015Inventors: Kenichi OSADA, Koichiro ISHIBASHI, Yoshikazu SAITOH, Akio NISHIDA, Masaru NAKAMICHI, Naoki KITAI
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Patent number: 9111636Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: GrantFiled: July 3, 2014Date of Patent: August 18, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Publication number: 20150155031Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: ApplicationFiled: July 3, 2014Publication date: June 4, 2015Inventors: Kenichi OSADA, Koichiro ISHIBASHI, Yoshikazu SAITOH, Akio NISHIDA, Masaru NAKAMICHI, Naoki KITAI
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Patent number: 8797791Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: GrantFiled: April 18, 2013Date of Patent: August 5, 2014Assignee: Renesas Electronics CorporationInventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Publication number: 20130229860Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: ApplicationFiled: April 18, 2013Publication date: September 5, 2013Applicant: Renesas Electronics CorporationInventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Patent number: 8437179Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: GrantFiled: June 20, 2012Date of Patent: May 7, 2013Assignee: Renesas Electronics CorporationInventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Publication number: 20120257443Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: ApplicationFiled: June 20, 2012Publication date: October 11, 2012Applicant: Renesas Electronics CorporationInventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Patent number: 8232589Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: GrantFiled: January 17, 2012Date of Patent: July 31, 2012Assignee: Renesas Electronics CorporationInventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Publication number: 20120113709Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: ApplicationFiled: January 17, 2012Publication date: May 10, 2012Applicant: Renesas Electronics CorporationInventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Patent number: 8125017Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: GrantFiled: May 13, 2011Date of Patent: February 28, 2012Assignee: Renesas Electronics CorporationInventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Publication number: 20110215414Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: ApplicationFiled: May 13, 2011Publication date: September 8, 2011Inventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Patent number: 7964484Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: GrantFiled: June 25, 2009Date of Patent: June 21, 2011Assignees: Renesas Electronics Corporation, Hitachi ULSI Systems Co., Ltd.Inventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Publication number: 20090269899Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: ApplicationFiled: June 25, 2009Publication date: October 29, 2009Inventors: Kenichi OSADA, Koichiro ISHIBASHI, Yoshikazu SAITOH, Akio NISHIDA, Masaru NAKAMICHI, Naoki KITAI
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Patent number: 7585981Abstract: The present invention provides an industrial method that allows to produce an indole derivative trimer with high purity in mass, as well as novel indole derivative trimers obtainable by the method, having high conductivity, high oxidation-reduction potential, high oxidation-reduction capacity, and the excellent cycle characteristics. The present invention relates to a method of producing an indole derivative trimer comprising the step of oxidizing an indole derivative in a reaction solution containing an organic solvent and to the novel trimers produced by the method.Type: GrantFiled: May 22, 2006Date of Patent: September 8, 2009Assignee: Mitsubishi Rayon Co., Ltd.Inventors: Shinichi Maeda, Fumino Momose, Yoshikazu Saitoh, Takashi Saitoh
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Patent number: 7569881Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: GrantFiled: April 9, 2008Date of Patent: August 4, 2009Assignees: Renesas Technology Corporation, Hitachi ULSI Systems Co., Ltd.Inventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Publication number: 20090009236Abstract: The present invention provides a semiconductor integrated circuit device equipped with a negative feedback amplifier circuit or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage.Type: ApplicationFiled: September 2, 2008Publication date: January 8, 2009Inventor: Yoshikazu Saitoh
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Patent number: 7436247Abstract: A semiconductor integrated circuit device is equipped with a negative feedback amplifier circuit or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage.Type: GrantFiled: April 13, 2007Date of Patent: October 14, 2008Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.Inventor: Yoshikazu Saitoh
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Publication number: 20080203437Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: ApplicationFiled: April 9, 2008Publication date: August 28, 2008Inventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai
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Patent number: 7388238Abstract: The gate tunnel leakage current is increased in the up-to-date process, so that it is necessary to reduce the gate tunnel leakage current in the LSI which is driven by a battery for use in a cellular phone and which needs to be in a standby mode at a low leakage current. In a semiconductor integrated circuit device, the ground source electrode lines of logic and memory circuits are kept at a ground potential in an active mode, and are kept at a voltage higher than the ground potential in an unselected standby mode. The gate tunnel leakage current can be reduced without destroying data.Type: GrantFiled: June 14, 2006Date of Patent: June 17, 2008Assignees: Renesas Technology Corp., Hitachi ULSI Systems Co., Ltd.Inventors: Kenichi Osada, Koichiro Ishibashi, Yoshikazu Saitoh, Akio Nishida, Masaru Nakamichi, Naoki Kitai