Patents by Inventor Yoshikazu Yorimoto

Yoshikazu Yorimoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5410714
    Abstract: A semiconductor integrated-circuit card including a microprocessor having an active mode of operation capable of processing data and a low power consumption mode of operation disabled from processing data, the microprocessor being operative to (1) establish the low power consumption mode of operation in the IC card when the microprocessor is initially activated to start operation, (2) make a shift from the low power consumption mode of operation to the active mode of operation responsive to an interrupt signal from an external signal source, and (3) make a shift from the active mode of operation back to the low power consumption mode of operation upon termination of the data processing in the active mode of operation.
    Type: Grant
    Filed: April 23, 1992
    Date of Patent: April 25, 1995
    Assignee: Toppan Printing Co. Ltd.
    Inventors: Yoshikazu Yorimoto, Masashi Takahashi, Seiji Hirano
  • Patent number: 5129091
    Abstract: A semiconductor integrated-circuit card including a microprocessor having an active mode of operation capable of processing data and a low power consumption mode of operation disabled from processing data, the microprocessor being operative to (1) establish the low power consumption mode of operation in the IC card when the microprocessor is initially activated to start operation, (2) make a shift from the low power consumption mode of operation to the active mode of operation responsive to an interrupt signal from an external signal source, and (3) make a shift from the active mode of operation back to the low power consumption mode of operation upon termination of the data processing in the active mode of operation.
    Type: Grant
    Filed: May 4, 1989
    Date of Patent: July 7, 1992
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Yoshikazu Yorimoto, Masashi Takahashi, Seiji Hirano
  • Patent number: 5015834
    Abstract: An information card system according to the present invention establishes a data communication between a terminal unit and an information card after receipt of an acknowledge signal supplied from the information card to the terminal unit, and the acknowledge signal is produced by a combination of a periodical signal retrieving circuit and an output unit incorporated in the information card upon receiving a periodical signal fed from the terminal unit, so that a misfit between the information card and the terminal unit is detectable before the data communication.
    Type: Grant
    Filed: April 7, 1989
    Date of Patent: May 14, 1991
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Tadato Suzuki, Yoshikazu Yorimoto, Hidekazu Matsumura, Seiji Hirano
  • Patent number: 4908038
    Abstract: An integrated circuit card having a one-chip micro computer, a memory, and an address bus and data bus for coupling the micro computer and the memory, includes an input/output bus and interface for communication with an external terminal device. The micro computer executes processing commands from the external device, and returns the processing results to the external device through the interface. Instead of returning the processing results to the micro computer immediately when processing is finished, the IC card includes a timer for measuring elapsed time starting with the receipt of a processing command. The processing results are returned to the external device only when a predetermined elapsed time has been measured by the timer.
    Type: Grant
    Filed: October 27, 1988
    Date of Patent: March 13, 1990
    Assignee: Toppan Printing Co., Ltd
    Inventors: Hidekazu Matsumura, Yoshikazu Yorimoto
  • Patent number: 4748320
    Abstract: In an IC (integrated circuit) card, a CPU (central processing unit) is connected to a data bus and an address bus. A data memory is connected to the data bus and the address bus. The data memory is a rewritable memory, such as EEPROM (electrically erasable programmable read only memory) or battery backed-up RAM (random access memory). The data memory is segmented into a predetermined number of sectors each consisting of predetermined bytes. An external processing device, such as a terminal device is connected to the data bus and the address bus, via a one-bit I/O line and a port. The terminal device supplies a processing instruction via the I/O line to the third port. The CPU receives the processing instruction via the data bus, analyzes the instruction, and reads out and executes the necessary program. The CPU supplies the results of each processing to the terminal device, by way of the data bus, the port and the I/O bus.
    Type: Grant
    Filed: October 27, 1986
    Date of Patent: May 31, 1988
    Assignee: Toppan Printing Co., Ltd.
    Inventors: Yoshikazu Yorimoto, Masashi Takahashi