Patents by Inventor Yoshiki Hayasaki

Yoshiki Hayasaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230226561
    Abstract: A casing includes a tubular part including a gas inlet; a gas outlet apart from the gas inlet in an axial direction of the tubular part and in communicative connection with an inside and an outside of the tubular part; and a solid substance discharge port aligned with the gas outlet in a direction along an outer periphery of the tubular part. A blade rotates together with a rotor and has a first end adjacent to the gas inlet and a second end adjacent to the gas outlet. The casing has a space extending to the solid substance discharge port with respect to the second end of the blade in the axial direction of the tubular part. A separation device further includes a discharge tubular part having an inner space in communicative connection with the solid substance discharge port and protruding from an outer peripheral surface of the tubular part.
    Type: Application
    Filed: April 16, 2021
    Publication date: July 20, 2023
    Inventors: Masanao KAMAKURA, Yoshiki HAYASAKI, Osamu AKASAKA, Shota TSURUI
  • Publication number: 20230149951
    Abstract: A sensor system includes a sensor element, a signal processing circuit, and a pseudo-signal correction circuit. The sensor element outputs an electric signal corresponding to an external force. The signal processing circuit converts the electric signal coming from the sensor element into a signal having a certain signal format and then outputs the signal thus converted. The pseudo-signal correction circuit corrects a pseudo-signal outputted by the sensor element. When receiving a test signal, the sensor element performs a self-diagnosis based on the test signal and then outputs the pseudo-signal, which represents a result of the self-diagnosis. The pseudo-signal correction circuit corrects the pseudo-signal based on environment information about an environment where at least one of the sensor element or the signal processing circuit is located.
    Type: Application
    Filed: March 11, 2021
    Publication date: May 18, 2023
    Inventors: Masanao KAMAKURA, Yoshiki HAYASAKI, Shota TSURUI
  • Publication number: 20220379251
    Abstract: A separating device includes a casing, a rotor, and a blade. The casing has a gas inlet, a gas outlet, and a discharge port for solid substances. The rotor is disposed on an inner side of the casing and is configured to be rotatable around a central axis of rotation of the rotor, the central axis of rotation extending along an axial direction of the casing. The blade is disposed between the casing and the rotor and is configured to rotate together with the rotor. The blade has a first end adjacent to the gas inlet and a second end adjacent to the gas outlet. The casing has a space between the second end of the blade and the discharge port in the axial direction.
    Type: Application
    Filed: September 11, 2020
    Publication date: December 1, 2022
    Inventors: Shota TSURUI, Yoshiki HAYASAKI, Masanao KAMAKURA
  • Patent number: 10258999
    Abstract: A separator includes a rotor, a plurality of flow channels each of which has an inlet and an outlet for gas and are in a vicinity of a rotation axis of the rotor, an air current producer configured to cause gas to flow through the plurality of flow channels, a driving device configured to rotate the rotor to rotate the plurality of flow channels around the rotation axis, and a discharger for allowing discharge of solid materials suspended in airstream produced in each of the plurality of flow channels, in a direction away from the rotation axis.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: April 16, 2019
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Osamu Akasaka, Yoshiki Hayasaki, Koji Tsuji, Hirotaka Matsunami, Masanao Kamakura, Yoshikazu Kuzuoka
  • Publication number: 20170274391
    Abstract: A separator includes a rotor, a plurality of flow channels each of which has an inlet and an outlet for gas and are in a vicinity of a rotation axis of the rotor, an air current producer configured to cause gas to flow through the plurality of flow channels, a driving device configured to rotate the rotor to rotate the plurality of flow channels around the rotation axis, and a discharger for allowing discharge of solid materials suspended in airstream produced in each of the plurality of flow channels, in a direction away from the rotation axis.
    Type: Application
    Filed: December 9, 2015
    Publication date: September 28, 2017
    Inventors: Osamu AKASAKA, Yoshiki HAYASAKI, Koji TSUJI, Hirotaka MATSUNAMI, Masanao KAMAKURA, Yoshikazu KUZUOKA
  • Publication number: 20140217391
    Abstract: An organic EL element includes an organic EL substrate 4 including an organic light emitting unit provided on a translucent substrate, and a sealing cap substrate sealing the light emitting unit. The organic EL substrate includes first electrode taking-out pads and provided in electrodes which feed power to the light emitting unit, and a first bonding portion 40 provided in a peripheral portion of the translucent substrate. The sealing cap substrate includes second electrode taking-out pads and facing the first electrode taking-out pads, through-wiring and passing through the sealing cap substrate, and a second bonding portion facing the first bonding portion. The first bonding portion and the second bonding portion are bonded together through surface activated bonding.
    Type: Application
    Filed: October 1, 2012
    Publication date: August 7, 2014
    Inventors: Yoshiki Hayasaki, Toru Baba, Takeo Sirai
  • Patent number: 8390173
    Abstract: The MEMS switch comprises a substrate with signal-lines having fixed-contacts, a movable-plate with a movable-contact, a flexible support-member supporting the movable-plate, a static-actuator and a piezoelectric-actuator configured to contact the movable-contact with the fixed-contact. The movable-contact is provided at its longitudinal center with the movable-contact, and its both the longitudinal ends with static-movable-electrode-plate. The support-member is four strips disposed on portions outside of the both width ends of the movable plate. The strip extends along the longitudinal direction of the movable plate, provided with a first end fixed to the movable plate, and provided with a second end fixed to the substrate. The piezoelectric-element is disposed on an upper surface of the strip to be located at a portion outside of the width ends of the movable-plate.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: March 5, 2013
    Assignee: Panasonic Corporation
    Inventors: Takaaki Yoshihara, Yoshiki Hayasaki, Takeo Shirai, Tomoaki Matsushima, Hiroshi Kawada, Yousuke Hagihara
  • Patent number: 8098118
    Abstract: A bandpass filter includes a combination of a BAW filter and a patterned planar filter with stubs. The BAW filter is composed of a plurality of piezoelectric resonators to give a specific frequency bandpass, while the planer filter is configured to attenuate frequencies near and outside the bandpass. The resonators are connected in a ladder configuration between a first signal transmission path and a ground. The planar filter includes a strip line formed on a dielectric layer to define a second signal transmission path. The BAW filter and the planar filter are formed on a common substrate with the first and second transmission paths connected to each other. The BAW filter, in combination with the patterned planar filter added with the stub, can improve a deep near-band rejection inherent to the BAW filter, exhibiting an excellent out-of-band rejection over certain adjacent frequency ranges outside of the bandpass, and therefore give a sharp and wide bandpass.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: January 17, 2012
    Assignee: Panasonic Electric Works Co., Ltd.
    Inventors: Atsushi Suwa, Koji Sasabe, Futoshi Nishimura, Yoshiki Hayasaki, Tomoaki Matsushima, Sibei Xiong, Takaaki Yoshihara, Norihiro Yamauchi, Takeo Shirai
  • Publication number: 20110024274
    Abstract: The MEMS switch comprises a substrate with signal-lines having fixed-contacts, a movable-plate with a movable-contact, a flexible support-member supporting the movable-plate, a static-actuator and a piezoelectric-actuator configured to contact the movable-contact with the fixed-contact. The movable-contact is provided at its longitudinal center with the movable-contact, and its both the longitudinal ends with static-movable-electrode-plate. The support-member is four strips disposed on portions outside of the both width ends of the movable plate. The strip extends along the longitudinal direction of the movable plate, provided with a first end fixed to the movable plate, and provided with a second end fixed to the substrate. The piezoelectric-element is disposed on an upper surface of the strip to be located at a portion outside of the width ends of the movable-plate.
    Type: Application
    Filed: March 30, 2009
    Publication date: February 3, 2011
    Inventors: Takaaki Yoshihara, Yoshiki Hayasaki, Takeo Shirai, Tomoaki Matsushima, Hiroshi Kawada, Yousuke Hagihara
  • Publication number: 20100117763
    Abstract: A bandpass filter includes a combination of a BAW filter and a patterned planar filter with stubs. The BAW filter is composed of a plurality of piezoelectric resonators to give a specific frequency bandpass, while the planer filter is configured to attenuate frequencies near and outside the bandpass. The resonators are connected in a ladder configuration between a first signal transmission path and a ground. The planar filter includes a strip line formed on a dielectric layer to define a second signal transmission path. The BAW filter and the planar filter are formed on a common substrate with the first and second transmission paths connected to each other. The BAW filter, in combination with the patterned planar filter added with the stub, can improve a deep near-band rejection inherent to the BAW filter, exhibiting an excellent out-of-band rejection over certain adjacent frequency ranges outside of the bandpass, and therefore give a sharp and wide bandpass.
    Type: Application
    Filed: February 19, 2008
    Publication date: May 13, 2010
    Inventors: Atsushi Suwa, Koji Sasabe, Futoshi Nishimura, Yoshiki Hayasaki, Tomoaki Matsushima, Sibei Xiong, Takaaki Yoshihara, Norihiro Yamauchi, Takeo Shirai
  • Patent number: 6580126
    Abstract: A solid state relay composed of a series connected pair of LDMOSFETs has a minimized output capacitance. Each LDMOSFET is configured to have a silicon layer of a first conductive type, a drain region of the first conductive type diffused in the top surface of the silicon layer, a well region of a second conductive type diffused in the silicon layer in a laterally spaced relation from the drain region, and a source region of the first conductive type diffused within the well region to define a channel extending between the source region and a confronting edge of the well region along the top surface of the silicon layer. Each LDMOSFET is of an SOI (Silicon-On-Insulator) structure composed of a silicon substrate placed on a supporting plate, a buried oxide layer on the silicon substrate, and the silicon layer on the buried oxide layer.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: June 17, 2003
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Masahiko Suzumura, Hitomichi Takano, Yuji Suzuki, Takashi Kishida, Yoshiki Hayasaki, Yoshifumi Shirai, Takeshi Yoshida, Yasunori Miyamoto
  • Patent number: 6448620
    Abstract: To provide a semiconductor device having a large allowable current, a demanded withstand voltage, and small output capacitance and resistance, the semiconductor device comprises a semiconductor layer formed on a semiconductor substrate, and the semiconductor layer includes a first conductivity type-drain region, a second conductivity type-well region apart from the drain region, a first conductivity type-source region in the well region apart from one end of the well region on the side of the drain region, a first conductivity type-drift region formed between one end of the well region and the drain region and in contact with the well region and the drain region, respectively, and a gate electrode formed spaced a gate oxide layer and on the well region located between the drift region and the source region; and the impurity concentration of the drift region decreases in the lateral direction and also in the vertical direction, respectively, as the distance from the drain region increases.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: September 10, 2002
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Yoshiki Hayasaki, Hitomichi Takano, Masahiko Suzumura, Yuji Suzuki, Yoshifumi Shirai, Takashi Kishida, Takeshi Yoshida, Takaaki Yoshihara
  • Patent number: 6373101
    Abstract: A solid state relay composed of a series connected pair of LDMOSFETs has a minimized output capacitance. Each LDMOSFET is configured to have a silicon layer of a first conductive type, a drain region of the first conductive type diffused in the top surface of the silicon layer, a well region of a second conductive type diffused in the silicon layer in a laterally spaced relation from the drain region, and a source region of the first conductive type diffused within the well region to define a channel extending between the source region and a confronting edge of the well region along the top surface of the silicon layer. Each LDMOSFET is of an SOI (Silicon-On-Insulator) structure composed of a silicon substrate placed on a supporting plate, a buried oxide layer on the silicon substrate, and the silicon layer on the buried oxide layer.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: April 16, 2002
    Assignee: Matsushita Electric Works
    Inventors: Masahiko Suzumura, Hitomichi Takano, Yuji Suzuki, Takashi Kishida, Yoshiki Hayasaki, Yoshifumi Shirai, Takeshi Yoshida, Yasunori Miyamoto
  • Publication number: 20010013624
    Abstract: To provide a semiconductor device having a large allowable current, a demanded withstand voltage, and small output capacitance and resistance, the semiconductor device comprises a semiconductor layer formed on a semiconductor substrate, and the semiconductor layer includes a first conductivity type-drain region, a second conductivity type-well region apart from the drain region, a first conductivity type-source region in the well region apart from one end of the well region on the side of the drain region, a first conductivity type-drift region formed between one end of the well region and the drain region and in contact with the well region and the drain region, respectively, and a gate electrode formed spaced a gate oxide layer and on the well region located between the drift region and the source region; and the impurity concentration of the drift region decreases in the lateral direction and also in the vertical direction, respectively, as the distance from the drain region increases.
    Type: Application
    Filed: December 22, 2000
    Publication date: August 16, 2001
    Applicant: Matsushita Electric Works, Ltd.
    Inventors: Yoshiki Hayasaki, Hitomichi Takano, Masahiko Suzumura, Yuji Suzuki, Yoshifumi Shirai, Takashi Kishida, Takeshi Yoshida, Takaaki Yoshihara
  • Patent number: 6211551
    Abstract: A solid state relay composed of a series connected pair of LDMOSFETs has a minimized output capacitance. Each LDMOSFET is configured to have a silicon layer of a first conductive type, a drain region of the first conductive type diffused in the top surface of the silicon layer, a well region of a second conductive type diffused in the silicon layer in a laterally spaced relation from the drain region, and a source region of the first conductive type diffused within the well region to define a channel extending between the source region and a confronting edge of the well region along the top surface of the silicon layer. Each LDMOSFET is of an SOI (Silicon-On-Insulator) structure composed of a silicon substrate placed on a supporting plate, a buried oxide layer on the silicon substrate, and the silicon layer on the buried oxide layer.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: April 3, 2001
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Masahiko Suzumura, Hitomichi Takano, Yuji Suzuki, Takashi Kishida, Yoshiki Hayasaki, Yoshifumi Shirai, Takeshi Yoshida, Yasunori Miyamoto
  • Patent number: 5780900
    Abstract: A thin film transistor of SOI (Silicon-On-Insulator) type includes a buried oxide layer formed on a semiconductor substrate, a silicon layer of a first conductive type formed on the buried oxide layer, and an upper oxide layer formed on the silicon layer. The silicon layer has a body region of a second conductive type, source region of the first conductive type, drain region of the first conductive type, and a drift region of the first conductive type. The silicon layer is formed with a first portion of a thickness T1 in which the doping region is formed, and a second portion of a thickness T2 in which the body region is formed to reach the buried oxide layer. When the thicknesses T1 and T2 are determined so as to satisfy the relationships:0.4 .mu.m<T1,0.4 .mu.m.ltoreq.T2.ltoreq.1.5 .mu.m, andT2<T1,The transistor exhibits an improved power dissipation, high breakdown voltage, and a low on-resistance, and also provides advantages in a manufacturing process of the transistor.
    Type: Grant
    Filed: October 17, 1996
    Date of Patent: July 14, 1998
    Assignee: Matsushita Electric Works, Inc.
    Inventors: Yuji Suzuki, Hitomichi Takano, Masahiko Suzumura, Yoshiki Hayasaki, Takashi Kishida, Yoshifumi Shirai