Patents by Inventor Yoshiko Ikeda
Yoshiko Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11812935Abstract: In an endoscope cleaning work support device, an operation reception unit received an input from a cleaner. A display control unit controls the display unit to display a procedure for manual cleaning of an endoscope on a display unit step by step. A measurement unit measures a first period of time from a start time of a procedure in a current step marked by reception of an input for displaying the procedure in the current step by the operation reception unit, to an end time of the procedure in the current step marked by reception of an input for displaying a procedure in a subsequent step by the operation reception unit. A comparison determination unit compares a reference period of time defined for each step for displaying the procedure with the first period of time. The display control unit displays information for alerting the cleaner when the first period of time is shorter than the reference period of time on the display unit.Type: GrantFiled: April 29, 2020Date of Patent: November 14, 2023Assignee: OLYMPUS CORPORATIONInventors: Tetsuya Nishi, Hikari Shimizu, Clarinda Kuan, Kaori Kitano, Yoshiko Ikeda, Takeshi Nishiyama
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Patent number: 11482318Abstract: An examination image storage stores a plurality of examination images having image-capturing time information. A voice processing unit extracts information regarding a finding by recognizing voice that is input to a microphone, and an extracted information storage stores the extracted information regarding the finding and voice time information in association with each other. A grouping processing unit groups a plurality of examination images into one or more image groups based on the image-capturing time information. An association processing unit associates the information regarding the finding stored in the extracted information storage with an image group based on the voice time information. When one examination image is selected by a user, a finding selection screen generation unit generates a screen that displays information regarding a finding associated with an image group including the examination image that is selected.Type: GrantFiled: December 19, 2019Date of Patent: October 25, 2022Assignee: OLYMPUS CORPORATIONInventors: Akinori Sasaki, Yoshiko Ikeda
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Publication number: 20220336091Abstract: A cleaning apparatus management unit manages the utilization status of a first cleaning apparatus that can clean an endoscope that has been manually cleaned in a procedure in which one or more steps are skipped and the utilization status of a second cleaning apparatus that can clean an endoscope that has been manually cleaned by performing all the steps. A reception unit receives step information indicating a completed step during the manual cleaning of the endoscope. When the received step information indicates a predetermined step that comes before a final step, an assignment processing unit determines a cleaning apparatus to be assigned to the endoscope based on the relationship between scheduled completion time of the manual cleaning when the implementation of the one or more steps that come after the predetermined step is skipped and the utilization status of a plurality of cleaning apparatuses managed by the cleaning apparatus management unit.Type: ApplicationFiled: June 23, 2022Publication date: October 20, 2022Applicant: OLYMPUS CORPORATIONInventor: Yoshiko IKEDA
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Publication number: 20210313055Abstract: An endoscope management unit 32 manages whether or not an endoscope is in a cleaned state. A staff management unit 34 manages whether or not a medical staff member is in a state suitable for being assigned to work of handling an endoscope in a cleaned state. A staff identification unit 36 identifies a staff member who performs work related to the endoscope based on the state of the endoscope managed by the endoscope management unit 32 and on the state of the medical staff member managed by the staff management unit 34. A notification processing unit 42 notifies the identified medical staff member of the details of the work to be performed for the endoscope.Type: ApplicationFiled: June 18, 2021Publication date: October 7, 2021Applicant: OLYMPUS CORPORATIONInventor: Yoshiko IKEDA
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Publication number: 20200260943Abstract: In an endoscope cleaning work support device, an operation reception unit received an input from a cleaner. A display control unit controls the display unit to display a procedure for manual cleaning of an endoscope on a display unit step by step. A measurement unit measures a first period of time from a start time of a procedure in a current step marked by reception of an input for displaying the procedure in the current step by the operation reception unit, to an end time of the procedure in the current step marked by reception of an input for displaying a procedure in a subsequent step by the operation reception unit. A comparison determination unit compares a reference period of time defined for each step for displaying the procedure with the first period of time. The display control unit displays information for alerting the cleaner when the first period of time is shorter than the reference period of time on the display unit.Type: ApplicationFiled: April 29, 2020Publication date: August 20, 2020Applicant: OLYMPUS CORPORATIONInventors: Tetsuya NISHI, Hikari SHIMIZU, Clarinda KUAN, Kaori KITANO, Yoshiko IKEDA, Takeshi NISHIYAMA
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Publication number: 20200126655Abstract: An examination image storage stores a plurality of examination images having image-capturing time information. A voice processing unit extracts information regarding a finding by recognizing voice that is input to a microphone, and an extracted information storage stores the extracted information regarding the finding and voice time information in association with each other. A grouping processing unit groups a plurality of examination images into one or more image groups based on the image-capturing time information. An association processing unit associates the information regarding the finding stored in the extracted information storage with an image group based on the voice time information. When one examination image is selected by a user, a finding selection screen generation unit generates a screen that displays information regarding a finding associated with an image group including the examination image that is selected.Type: ApplicationFiled: December 19, 2019Publication date: April 23, 2020Applicant: OLYMPUS CORPORATIONInventors: Akinori SASAKI, Yoshiko IKEDA
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Patent number: 9337189Abstract: According to one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode; a second semiconductor layer provided between the first semiconductor layer and the second electrode, and the second semiconductor layer having a lower impurity concentration than the first semiconductor layer; a first semiconductor region provided between part of the second semiconductor layer and the second electrode; a second semiconductor region provided between a portion different from the part of the second semiconductor layer and the second electrode, and the second semiconductor region being in contact with the first semiconductor region; and a third semiconductor region provided between at least part of the first semiconductor region and the second electrode.Type: GrantFiled: May 11, 2015Date of Patent: May 10, 2016Assignee: Kabushiki Kaisha ToshibaInventors: Tsuneo Ogura, Tomoko Matsudai, Yuichi Oshino, Shinichiro Misu, Yoshiko Ikeda, Kazutoshi Nakamura
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Patent number: 9324815Abstract: According one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode and being in contact with the first electrode; a second semiconductor layer including a first part and a second part, and the second part being contact with the first electrode, and the second semiconductor layer having an effective impurity concentration lower than an effective impurity concentration in the first semiconductor layer; a third semiconductor layer provided between the second semiconductor layer and the second electrode, and having an effective impurity concentration lower than an effective impurity concentration in the second semiconductor layer; and a fourth semiconductor layer provided between the third semiconductor layer and the second electrode, and being in contact with the second electrode.Type: GrantFiled: May 1, 2015Date of Patent: April 26, 2016Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Tsuneo Ogura, Tomoko Matsudai, Yuuichi Oshino, Yoshiko Ikeda, Kazutoshi Nakamura, Ryohei Gejo
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Patent number: 9214535Abstract: A collector layer of a first conductivity type is provided in the IGBT region and the boundary region and functions as a collector of the IGBT in the IGBT region. A cathode layer of a second conductivity type is provided in the diode region apart from the collector layer and functions as a cathode of the diode. A drift layer of the second conductivity type is provided in the IGBT region, the boundary region, and the diode region, the drift layer being provided on sides of the collector layer and the cathode layer opposite the first electrode. A diffusion layer of the first conductivity type is provided in the boundary region on a side of the drift layer opposite the first electrode.Type: GrantFiled: September 10, 2013Date of Patent: December 15, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Tomoko Matsudai, Tsuneo Ogura, Kazutoshi Nakamura, Yuichi Oshino, Hideaki Ninomiya, Yoshiko Ikeda
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Publication number: 20150243656Abstract: According to one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode; a second semiconductor layer provided between the first semiconductor layer and the second electrode, and the second semiconductor layer having a lower impurity concentration than the first semiconductor layer; a first semiconductor region provided between part of the second semiconductor layer and the second electrode; a second semiconductor region provided between a portion different from the part of the second semiconductor layer and the second electrode, and the second semiconductor region being in contact with the first semiconductor region; and a third semiconductor region provided between at least part of the first semiconductor region and the second electrode.Type: ApplicationFiled: May 11, 2015Publication date: August 27, 2015Inventors: Tsuneo Ogura, Tomoko Matsudai, Yuichi Oshino, Shinichiro Misu, Yoshiko Ikeda, Kazutoshi Nakamura
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Publication number: 20150236104Abstract: According one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode and being in contact with the first electrode; a second semiconductor layer including a first part and a second part, and the second part being contact with the first electrode, and the second semiconductor layer having an effective impurity concentration lower than an effective impurity concentration in the first semiconductor layer; a third semiconductor layer provided between the second semiconductor layer and the second electrode, and having an effective impurity concentration lower than an effective impurity concentration in the second semiconductor layer; and a fourth semiconductor layer provided between the third semiconductor layer and the second electrode, and being in contact with the second electrode.Type: ApplicationFiled: May 1, 2015Publication date: August 20, 2015Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tsuneo OGURA, Tomoko MATSUDAI, Yuuichi OSHINO, Yoshiko IKEDA, Kazutoshi NAKAMURA, Ryohei GEJO
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Patent number: 9059236Abstract: According to one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode; a second semiconductor layer provided between the first semiconductor layer and the second electrode, and the second semiconductor layer having a lower impurity concentration than the first semiconductor layer; a first semiconductor region provided between part of the second semiconductor layer and the second electrode; a second semiconductor region provided between a portion different from the part of the second semiconductor layer and the second electrode, and the second semiconductor region being in contact with the first semiconductor region; and a third semiconductor region provided between at least part of the first semiconductor region and the second electrode.Type: GrantFiled: August 29, 2013Date of Patent: June 16, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Tsuneo Ogura, Tomoko Matsudai, Yuichi Oshino, Shinichiro Misu, Yoshiko Ikeda, Kazutoshi Nakamura
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Patent number: 9054066Abstract: According one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode and being in contact with the first electrode; a second semiconductor layer including a first part and a second part, and the second part being contact with the first electrode, and the second semiconductor layer having an effective impurity concentration lower than an effective impurity concentration in the first semiconductor layer; a third semiconductor layer provided between the second semiconductor layer and the second electrode, and having an effective impurity concentration lower than an effective impurity concentration in the second semiconductor layer; and a fourth semiconductor layer provided between the third semiconductor layer and the second electrode, and being in contact with the second electrode.Type: GrantFiled: August 29, 2013Date of Patent: June 9, 2015Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Tsuneo Ogura, Tomoko Matsudai, Yuuichi Oshino, Yoshiko Ikeda, Kazutoshi Nakamura, Ryohei Gejo
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Publication number: 20140124832Abstract: According to one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode; a second semiconductor layer provided between the first semiconductor layer and the second electrode, and the second semiconductor layer having a lower impurity concentration than the first semiconductor layer; a first semiconductor region provided between part of the second semiconductor layer and the second electrode; a second semiconductor region provided between a portion different from the part of the second semiconductor layer and the second electrode, and the second semiconductor region being in contact with the first semiconductor region; and a third semiconductor region provided between at least part of the first semiconductor region and the second electrode.Type: ApplicationFiled: August 29, 2013Publication date: May 8, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tsuneo Ogura, Tomoko Matsudai, Yuichi Oshino, Shinichiro Misu, Yoshiko Ikeda, Kazutoshi Nakamura
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Publication number: 20140084337Abstract: A collector layer of a first conductivity type is provided in the IGBT region and the boundary region and functions as a collector of the IGBT in the IGBT region. A cathode layer of a second conductivity type is provided in the diode region apart from the collector layer and functions as a cathode of the diode. A drift layer of the second conductivity type is provided in the IGBT region, the boundary region, and the diode region, the drift layer being provided on sides of the collector layer and the cathode layer opposite the first electrode. A diffusion layer of the first conductivity type is provided in the boundary region on a side of the drift layer opposite the first electrode.Type: ApplicationFiled: September 10, 2013Publication date: March 27, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tomoko Matsudai, Tsuneo Ogura, Kazutoshi Nakamura, Yuichi Oshino, Hideaki Ninomiya, Yoshiko Ikeda
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Publication number: 20140061875Abstract: According one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode and being in contact with the first electrode; a second semiconductor layer including a first part and a second part, and the second part being contact with the first electrode, and the second semiconductor layer having an effective impurity concentration lower than an effective impurity concentration in the first semiconductor layer; a third semiconductor layer provided between the second semiconductor layer and the second electrode, and having an effective impurity concentration lower than an effective impurity concentration in the second semiconductor layer; and a fourth semiconductor layer provided between the third semiconductor layer and the second electrode, and being in contact with the second electrode.Type: ApplicationFiled: August 29, 2013Publication date: March 6, 2014Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tsuneo OGURA, Tomoko MATSUDAI, Yuuichi OSHINO, Yoshiko IKEDA, Kazutoshi NAKAMURA, Ryohei GEJO
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Patent number: 7292955Abstract: The invention performs an AC stress test assuming the CMOS operation and an AC stress test using a ring oscillator (R.O.) between a DC stress test method using single semiconductor elements and an aging test method. The deterioration of a semiconductor apparatus can be estimated highly precisely by separately performing the AC stress test assuming the CMOS operation on OFF-stress and ON-stress.Type: GrantFiled: April 11, 2003Date of Patent: November 6, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Etsuko Asano, Masahiko Hayakawa, Yoshiko Ikeda
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Publication number: 20030204820Abstract: The invention performs an AC stress test assuming the CMOS operation and an AC stress test using a ring oscillator (R.O.) between a DC stress test method using single semiconductor elements and an aging test method. The deterioration of a semiconductor apparatus can be estimated highly precisely by separately performing the AC stress test assuming the CMOS operation on OFF-stress and ON-stress.Type: ApplicationFiled: April 11, 2003Publication date: October 30, 2003Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Etsuko Asano, Masahiko Hayakawa, Yoshiko Ikeda
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Patent number: 6075414Abstract: The invention provides a high frequency amplifier in which a variable attenuator consisting of a bypass FET, which has a drain connected to a first-stage amplifying FET via a resistor, and a source grounded via a capacitor, is located on a main signal line leading to the gate of the amplifying FET, in order to control the gate potential of a bypass FET using a gain control voltage source, thereby varying the gain of the amplifier.Type: GrantFiled: March 13, 1998Date of Patent: June 13, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Masami Nagaoka, Yoshiko Ikeda, Toshiki Seshita, Atsushi Kameyama
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Patent number: 5748053Abstract: A switching circuit is made by serially connecting two field effect transistors in series in a small-signal transmission path, each of the transistors being applied with a substantially equal voltage, so as to lower a voltage applied to each of the FETs in the OFF state by voltage division, with the result that a high withstand voltage of the transmission path can be attained and a linear output can be obtained even when a large electric power is transmitted.Type: GrantFiled: September 27, 1996Date of Patent: May 5, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Atsushi Kameyama, Katsue Kawakyu, Yoshiko Ikeda