Patents by Inventor Yoshimasa Horii

Yoshimasa Horii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8652854
    Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: February 18, 2014
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Patent number: 8497539
    Abstract: To realize miniaturization/high integration and increase in the amount of accumulated charges, and to give a memory structure having a high reliability. A 1 transistor 1 capacitor (1T1C) structure having 1 ferroelectric capacitor structure and 1 selection transistor every memory cell is adopted, and respective capacitor structures are disposed respectively in either one layer of interlayer insulating films of 2 layers having different heights from the surface of a semiconductor substrate.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: July 30, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Yoshimasa Horii
  • Patent number: 8344434
    Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a first ferroelectric film on a first conductive film by a film-forming method including at least a step of forming a film by a sol-gel method; forming a second ferroelectric film on the first ferroelectric film by a sputtering method; forming a second conductive film on the second ferroelectric film; and forming a capacitor provided with a lower electrode, a capacitor dielectric film and an upper electrode by patterning the first conductive film, the first and second ferroelectric films and the second conductive film.
    Type: Grant
    Filed: May 4, 2011
    Date of Patent: January 1, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Wensheng Wang, Yoshimasa Horii
  • Patent number: 8222683
    Abstract: To realize miniaturization/high integration and increase in the amount of accumulated charges, and to give a memory structure having a high reliability. A 1 transistor 1 capacitor (1T1C) structure having 1 ferroelectric capacitor structure and 1 selection transistor every memory cell is adopted, and respective capacitor structures are disposed respectively in either one layer of interlayer insulating films of 2 layers having different heights from the surface of a semiconductor substrate.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: July 17, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Yoshimasa Horii
  • Publication number: 20120171785
    Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
    Type: Application
    Filed: March 12, 2012
    Publication date: July 5, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Publication number: 20120153368
    Abstract: To realize miniaturization/high integration and increase in the amount of accumulated charges, and to give a memory structure having a high reliability. A 1 transistor 1 capacitor (1T1C) structure having 1 ferroelectric capacitor structure and 1 selection transistor every memory cell is adopted, and respective capacitor structures are disposed respectively in either one layer of interlayer insulating films of 2 layers having different heights from the surface of a semiconductor substrate.
    Type: Application
    Filed: February 23, 2012
    Publication date: June 21, 2012
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Yoshimasa HORII
  • Patent number: 8153448
    Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: April 10, 2012
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Publication number: 20110204479
    Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a first ferroelectric film on a first conductive film by a film-forming method including at least a step of forming a film by a sol-gel method; forming a second ferroelectric film on the first ferroelectric film by a sputtering method; forming a second conductive film on the second ferroelectric film; and forming a capacitor provided with a lower electrode, a capacitor dielectric film and an upper electrode by patterning the first conductive film, the first and second ferroelectric films and the second conductive film.
    Type: Application
    Filed: May 4, 2011
    Publication date: August 25, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Wensheng Wang, Yoshimasa Horii
  • Patent number: 7960228
    Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a first ferroelectric film on a first conductive film by a film-forming method including at least a step of forming a film by a sol-gel method; forming a second ferroelectric film on the first ferroelectric film by a sputtering method; forming a second conductive film on the second ferroelectric film; and forming a capacitor provided with a lower electrode, a capacitor dielectric film and an upper electrode by patterning the first conductive film, the first and second ferroelectric films and the second conductive film.
    Type: Grant
    Filed: November 14, 2007
    Date of Patent: June 14, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Wensheng Wang, Yoshimasa Horii
  • Patent number: 7897413
    Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a ferroelectric film on a first conductive film by a sol-gel method; forming a first conductive metal oxide film on the ferroelectric film; carrying out a first annealing on the first conductive metal oxide film; forming a second conductive metal oxide film on the first conductive metal oxide film, so that the first and second conductive films serve as a second conductive film; and forming a capacitor by patterning the first conductive film, the ferroelectric film and the second conductive film. In the step of forming the first conductive metal oxide film, ferroelectric characteristics are adjusted with a flow rate ratio of oxygen by utilizing the fact that the ferroelectric characteristics of the ferroelectric film improve as the flow rate ratio of oxygen in a sputtering gas increases.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: March 1, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Wensheng Wang, Yoshimasa Horii
  • Publication number: 20090280577
    Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
    Type: Application
    Filed: May 12, 2009
    Publication date: November 12, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Tomohiro TAKAMATSU, Junichi WATANABE, Ko NAKAMURA, Wensheng WANG, Naoyuki SATO, Aki DOTE, Kenji NOMURA, Yoshimasa HORII, Masaki KURASAWA, Kazuaki TAKAI
  • Patent number: 7547933
    Abstract: There are provided a capacitor lower electrode formed on an adhesive layer, whose surface roughness is 0.79 nm or less, and having a (111) orientation that is inclined from a perpendicular direction to an upper surface of a substrate by 2.3° or less, a ferroelectric layer having a structure the (111) orientation of which is inclined from the perpendicular direction to the upper surface of the substrate by 3.5° or less, and a capacitor upper electrode.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: June 16, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Tomohiro Takamatsu, Junichi Watanabe, Ko Nakamura, Wensheng Wang, Naoyuki Sato, Aki Dote, Kenji Nomura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Publication number: 20080261332
    Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a ferroelectric film on a first conductive film by a sol-gel method; forming a first conductive metal oxide film on the ferroelectric film; carrying out a first annealing on the first conductive metal oxide film; forming a second conductive metal oxide film on the first conductive metal oxide film, so that the first and second conductive films serve as a second conductive film; and forming a capacitor by patterning the first conductive film, the ferroelectric film and the second conductive film. In the step of forming the first conductive metal oxide film, ferroelectric characteristics are adjusted with a flow rate ratio of oxygen by utilizing the fact that the ferroelectric characteristics of the ferroelectric film improve as the flow rate ratio of oxygen in a sputtering gas increases.
    Type: Application
    Filed: November 13, 2007
    Publication date: October 23, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Wensheng Wang, Yoshimasa Horii
  • Publication number: 20080111172
    Abstract: The present invention provides a method for manufacturing a semiconductor device, including the steps of: forming a first ferroelectric film on a first conductive film by a film-forming method including at least a step of forming a film by a sol-gel method; forming a second ferroelectric film on the first ferroelectric film by a sputtering method; forming a second conductive film on the second ferroelectric film; and forming a capacitor provided with a lower electrode, a capacitor dielectric film and an upper electrode by patterning the first conductive film, the first and second ferroelectric films and the second conductive film.
    Type: Application
    Filed: November 14, 2007
    Publication date: May 15, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Wensheng Wang, Yoshimasa Horii
  • Publication number: 20070170484
    Abstract: To realize miniaturization/high integration and increase in the amount of accumulated charges, and to give a memory structure having a high reliability. A 1 transistor 1 capacitor (1T1C) structure having 1 ferroelectric capacitor structure and 1 selection transistor every memory cell is adopted, and respective capacitor structures are disposed respectively in either one layer of interlayer insulating films of 2 layers having different heights from the surface of a semiconductor substrate.
    Type: Application
    Filed: September 6, 2006
    Publication date: July 26, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Yoshimasa Horii
  • Patent number: 7241656
    Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: July 10, 2007
    Assignee: Fujitsu Limited
    Inventors: Jeffrey Scott Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon
  • Patent number: 7239026
    Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: July 3, 2007
    Assignee: Fujitsu Limited
    Inventors: Jeffrey Scott Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon
  • Patent number: 7176132
    Abstract: There are provided a step of forming an insulating film over a semiconductor substrate, a step of exciting a plasma of a gas having a molecular structure in which hydrogen and nitrogen are bonded and then irradiating the plasma onto the insulating film, a step of forming a self-orientation layer made of substance having a self-orientation characteristic on the insulating film, and a step of forming a first conductive film made of conductive substance having the self-orientation characteristic on the self-orientation layer.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: February 13, 2007
    Assignee: Fujitsu Limited
    Inventors: Naoya Sashida, Katsuyoshi Matsuura, Yoshimasa Horii, Masaki Kurasawa, Kazuaki Takai
  • Publication number: 20060273365
    Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.
    Type: Application
    Filed: May 25, 2006
    Publication date: December 7, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Jeffrey Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon
  • Publication number: 20060211156
    Abstract: A semiconductor device comprises a substrate, a ferroelectric capacitor which includes a ferroelectric film on the substrate, and a stress application layer which applies tensile or compressive stress to the ferroelectric film of the ferroelectric capacitor by applying stress to the substrate.
    Type: Application
    Filed: May 25, 2006
    Publication date: September 21, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Jeffrey Cross, Mineharu Tsukada, Yoshimasa Horii, Alexei Gruverman, Angus Kingon