Patents by Inventor Yoshimasa Murayama
Yoshimasa Murayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6525336Abstract: A superfine electronic device is disclosed, which is constructed by atomic fine lines having a structure in which a plurality of atoms are arranged on one or a plurality of straight lines, in a ring shape or on curves with a size of atomic level, and which includes elements for doping electrons and holes. Using these atomic fine lines, it is possible to integrate semiconductor elements utilizing pn junctions at an atomic level with a high density. A groove having a sufficiently small size is formed in an insulating film disposed on a substrate. Then, atoms or molecules are supplied on the substrate and in the groove, which and are heated to a temperature sufficiently high for moving the atoms or molecules during or after the supply thereof to form a quantum fine line at edge portions of the groove.Type: GrantFiled: June 5, 1995Date of Patent: February 25, 2003Assignee: Hitachi, Ltd.Inventors: Seiichi Kondo, Yasuo Wada, Tsuyoshi Uda, Tokuo Kure, Tsuneo Ichiguchi, Shinji Okazaki, Yoshimasa Murayama
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Patent number: 6153500Abstract: A fine wire is fabricated by supplying metal atoms to one row or a plurality of rows formed by extraction of terminated atoms or molecules to the surface of substance made non-conductive by terminating all dangling bonds on the surface thereof with atoms or molecules. The conductivity of the fine wire can be attained by supplying metal atoms larger in number to that required for just terminating dangling bonds formed by extraction of terminated atoms or molecules.Type: GrantFiled: March 9, 2000Date of Patent: November 28, 2000Assignee: Hitachi, Ltd.Inventors: Satoshi Watanabe, Yoshimasa Murayama, Yoshimasa A. Ono, Tomihiro Hashizume, Yasuo Wada
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Patent number: 6114762Abstract: A fine wire is fabricated by supplying metal atoms to one row or a plurality of rows formed by extraction of terminated atoms or molecules at the surface of a substrate made non-conductive by terminating all dangling bonds on the surface thereof with atoms or molecules. The conductivity of the fine wire can be attained by supplying metal atoms larger in number to that required for just terminating dangling bonds formed by extraction of terminated atoms or molecules.Type: GrantFiled: August 21, 1997Date of Patent: September 5, 2000Assignee: Hitachi, Ltd.Inventors: Satoshi Watanabe, Yoshimasa Murayama, Yoshimasa A. Ono, Tomihiro Hashizume, Yasuo Wada
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Patent number: 5003366Abstract: The present invention provides a hetero-junction bipolar transistor (HBT) whichis so designed that the emitter injection efficiency is improved, the base transit time and base resistance are reduced and yet the lowering of the collector injection efficiency is suppressed, by forming at least one quantum well in a base region of the HBT and determining the width of one of the quantum levels formed in the quantum well and the energy in a barrier layer constituting the quantum well is within kT/2.Type: GrantFiled: June 25, 1990Date of Patent: March 26, 1991Assignee: Hitachi, Ltd.Inventors: Tomoyoshi Mishima, Junichi Kasai, Yoshimasa Murayama
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Patent number: 4967141Abstract: A superconductive ring or coil is irradiated with a light ray so that its superconducting state is destroyed for a short period of time. Under the destruction of the superconducting state, removal of energy from the superconductive ring or coil or storage of energy therein is stably controlled.Type: GrantFiled: August 24, 1988Date of Patent: October 30, 1990Assignee: Hitachi, Ltd.Inventors: Masashi Kiguchi, Yoshimasa Murayama
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Patent number: 4796068Abstract: A semiconductor device which utilizes the fact that the effective mass of charged particles becomes exceedingly large at certain points in the direction of a periodically repeating potential by virtue of a periodic structure in which semiconductor layers are stacked in the form of a superlattice. The periodic structure enables the movement of charged particles to be one-dimensional and thus permits a great improvement in the mobility of charged particles in the channel direction. Accordingly, it is possible to realize a FET of ultrahigh mobility.Type: GrantFiled: April 20, 1987Date of Patent: January 3, 1989Assignee: Hitachi, Ltd.Inventors: Yoshifumi Katayama, Yasuhiro Shiraki, Yoshimasa Murayama
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Patent number: 4785340Abstract: A semiconductor device includes a multilayer semiconductor structure comprising alternately p- (or n-) type heavily doped semiconductor layers and n- (or p-) type lightly doped semiconductor layers. Holes (or electrons) are confined within a narrow layer in a fashion like a two-dimensional gas, whereby high mobility is realized notwithstanding of high carrier concentration. Electrical conductivity of the multilayer semiconductor structure can be made higher than that of a bulk semiconductor. Very high conductivity can be realized by forming each layer in a thickness within a range of 10 .ANG. to 1000 .ANG. and preferably 50 .ANG. to 500 .ANG.. Ratio in impurity concentration of the heavily doped layer to the low doped layer is not smaller than one order of magnitude.Type: GrantFiled: March 13, 1986Date of Patent: November 15, 1988Assignee: Director-General of the Agency of Industrial Science and TechnologyInventors: Kiyokazu Nakagawa, Akitoshi Ishizaka, Yasuhiro Shiraki, Yoshimasa Murayama
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Patent number: 4759030Abstract: A semiconductor laser having high efficiency of luminescence can be obtained by forming a spatial fluctuation of potential so that the potential differs from position to position inside a plane perpendicular to a current flowing direction and electrons and holes or excitons formed by a combination of them can be localized not only in the current flowing direction but also inside the plane perpendicular to the current flowing direction. More definitely, corrugations or ruggedness having a mean pitch of below 100 nm and a level difference of from 1/10 to 1/2 of the mean thickness of an active layer are formed on the surface of the active layer of the semiconductor laser.Type: GrantFiled: June 5, 1986Date of Patent: July 19, 1988Assignee: Hitachi, Ltd.Inventors: Yoshimasa Murayama, Yasutsugu Takeda, Michiharu Nakamura, Yasuhiro Shiraki, Yoshifumi Katayama, Naoki Chinone
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Patent number: 4673959Abstract: There is disclosed a semiconductor device comprising at least first and second semiconductor layers positioned to form a hetero-junction therebetween, such a hetero-junction being adapted to form a channel, means for controlling carriers, and source and drain areas on opposite edges of the channel, wherein the first and second semiconductor layers formed between the source and drain regions have an area containing only 10.sup.16 cm.sup.-3 or less of an impurity; the first semiconductor layer has a wider forbidden band than that of the second semiconductor layer; and further including at least one semiconductor layer having a higher activation efficiency of impurities than that of the first semiconductor layer, with such at least one semiconductor layer being located on the side of the first semiconductor layer not in contact with the second semiconductor layer. A multi-quantum well structure may be used as the higher impurity activation efficiency semiconductor layer.Type: GrantFiled: December 27, 1984Date of Patent: June 16, 1987Assignee: Hitachi, Ltd.Inventors: Yasuhiro Shiraki, Yoshifumi Katayama, Yoshimasa Murayama, Makoto Morioka, Yasushi Sawada, Tomoyoshi Mishima, Takao Kuroda, Eiichi Maruyama
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Patent number: 4605945Abstract: In a semiconductor device having at least a first semiconductor layer and a second semiconductor layer which are arranged so as to form a heterojunction, an edge of a conduction band of the first semiconductor layer being positioned lower in energy than an edge of a conduction band of the second semiconductor layer in the vicinity of the heterojunction, at least one pair of electrodes which are electronically connected with the first semiconductor layer, and means to control carriers induced in the vicinity of the heterojunction; a semiconductor device characterized in that a low impurity concentration region is comprised in at least the part of the first semiconductor layer between the pair of electrodes, that a region adjoining each of the pair of electrodes is a high impurity concentration region, and that at least one layer containing an impurity which has a conductivity type identical or opposite to that of an impurity contained in the aforementioned regions is comprised in the first semiconductor layer.Type: GrantFiled: May 11, 1984Date of Patent: August 12, 1986Assignee: Hitachi, Ltd.Inventors: Yoshifumi Katayama, Yasuhiro Shiraki, Ken Yamaguchi, Yoshimasa Murayama, Yasushi Sawada, Toshiyuki Usagawa, Eiichi Maruyama
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Patent number: 4559547Abstract: The semiconductor device of the present invention is characterized by a device consisting of at least a heterojunction formed by the first semiconductor layer and the second semiconductor layer where the forbidden band gap of the said first semiconductor is smaller than that of the said second semiconductor, at least one pair of electrode regions connected electronically to the said first semiconductor and a means to control the carrier density in the said first semiconductor layer where the impurities are not included effectively in the region in the first semiconductor under the means to control the carriers and are included in the region adjacent to the said one pair of electrodes. The density of the impurities in these region are preferably be larger than 10.sup.16 cm.sup.-3.Type: GrantFiled: November 24, 1982Date of Patent: December 17, 1985Assignee: Hitachi, Ltd.Inventors: Yasuhiro Shiraki, Yoshimasa Murayama, Yoshifumi Katayama, Eiichi Maruyama
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Patent number: 4433202Abstract: A thin film solar cell formed on a substrate, comprising at least first and second electrodes, at least one of which is capable of passing light, a silicon film interposed between said first and second electrodes, and at least one junction formed in the silicon film for separating electrons and positive holes when the cell is exposed to light, wherein said silicon film comprises a mixed phase consisting of a polycrystalline phase and an amorphous phase, and includes at least about 50% by volume of fibrous crystalline grains, each of said grains having a maximum bottom diameter of about 1 .mu.m and a minimum height of about 50 nm and having its grain boundaries terminated with a monovalent element.The solar cell has a high photoelectric conversion efficiency comparable to that of a single-crystal solar cell, and can be produced at a low cost.Type: GrantFiled: March 26, 1982Date of Patent: February 21, 1984Assignee: Hitachi, Ltd.Inventors: Eiichi Maruyama, Toshikazu Shimada, Yasuhiro Shiraki, Yoshifumi Katayama, Hirokazu Matsubara, Akitoshi Ishizaka, Yoshimasa Murayama, Akira Shintani