Patents by Inventor Yoshimasa Ohki

Yoshimasa Ohki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6510672
    Abstract: Through a chemical vapor deposition process, a tubular graphite body is fabricated as a hydrogen storage element that comprises a tubular graphite body forming an elongated shell and at least one metal plug closing an open end of the elongated shell so as to form a closed inside space for storing hydrogen gas.
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: January 28, 2003
    Inventors: Yoshimasa Ohki, Sohji Tsuchiya, Akira Taomoto
  • Patent number: 5863601
    Abstract: A process of producing graphite fiber which includes the generation of the fiber by chemical vapor deposition using an organo metal compound which includes a metal catalyst and the use of a less reactive substance as a substrate to adhere carbon or metal at specific positions on the substrate. And a process of producing graphite fibers by chemical vapor deposition of fine particles of nickel, iron or cobalt as catalyst and use of an organic compound as a source of carbon which includes generating the fibers at a temperature between 650.degree. C. and 800.degree. C.
    Type: Grant
    Filed: July 9, 1996
    Date of Patent: January 26, 1999
    Assignee: Research Development Corporation of Japan
    Inventors: Rie Kikuchi, Masako Yudasaka, Yoshimasa Ohki
  • Patent number: 5316640
    Abstract: A testing sample is formed in a three-story structure consisting of a photo-resist 13, a silicon dioxide film 12, and a GaAs substrate 11. The pattern of the photo-resist 13 is transferred onto the silicon dioxide film 12 by effecting the photo-resist 13 as a mask. Thus obtained silicon dioxide film mask 14 and the GaAs substrate 11 are processed in compliance with a reactive ion beam etching method; that is, the silicon dioxide film mask 14 and the GaAs substrate 11 are irradiated by the chlorine ion beam 15. The silicon dioxide film and the GaAs substrate are gradually etched by the irradiation of the chlorine ion beam 15. In this case, the etching is differently developed in two regions. In one region which is not covered by the mask, the etching advances uniformly in a normal direction with respect to the GaAs substrate at a certain etching rate.
    Type: Grant
    Filed: June 9, 1992
    Date of Patent: May 31, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinichi Wakabayashi, Hitomaro Tougou, Yukio Toyoda, Yoshimasa Ohki
  • Patent number: 4476620
    Abstract: The substrate of a gallium nitride light-emitting diode is made rough at given positions on the surface thereof, or an insulating film strip pattern is attached on the surface of the substrate prior to growing an n-type conductive gallium nitride layer and a semi-insulating gallium nitride layer thereon. As a result, high conductivity regions are formed in the semi-insulating layer at positions corresponding to the rough surfaces or the insulating film strip pattern in such a manner that each of the high conductivity region extends from the n-type conductive layer to the upper surface of the semi-insulating layer so as to function as a conductor to be connected to an electrode. In the same manner similar high conductive regions are made along kerf portions in a diode wafer, preventing each diode chip from being damaged on cutting.
    Type: Grant
    Filed: March 31, 1983
    Date of Patent: October 16, 1984
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yoshimasa Ohki, Yukio Toyoda, Hiroyuki Kobayashi, Isamu Akasaki
  • Patent number: 4473938
    Abstract: An electroluminescent semiconductor device comprising bodies of conductive and resistive crystalline gallium nitride (GaN) which are successively epitaxially deposited on a surface of a heat-treated sapphire substrate, and a body of insulative crystalline gallium nitride epitaxially deposited on the resistive body.
    Type: Grant
    Filed: April 12, 1983
    Date of Patent: October 2, 1984
    Assignee: Matsushita Electric Industrial Co., Limited
    Inventors: Hiroyuki Kobayashi, Yoshimasa Ohki, Yukio Toyoda, Isamu Akasaki
  • Patent number: 4408217
    Abstract: An electroluminescent semiconductor device comprising bodies of conductive and resistive crystalline gallium nitride (GaN) which are successively epitaxially deposited on a surface of a heat-treated sapphire substrate, and a body of insulative crystalline gallium nitride epitaxially deposited on the resistive body.
    Type: Grant
    Filed: December 4, 1980
    Date of Patent: October 4, 1983
    Assignee: Matsushita Electric Industrial Company, Limited
    Inventors: Hiroyuki Kobayashi, Yoshimasa Ohki, Yukio Toyoda, Isamu Akasaki
  • Patent number: 4396929
    Abstract: The substrate of a gallium nitride light-emitting diode is made rough at given positions on the surface thereof, or an insulating film strip pattern is attached on the surface of the substrate prior to growing an n-type conductive gallium nitride layer and a semi-insulating gallium nitride layer thereon. As a result, high conductivity regions are formed in the semi-insulating layer at positions corresponding to the rough surfaces or the insulating film strip pattern in such a manner that each of the high conductivity region extends from the n-type conductive layer to the upper surface of the semi-insulating layer so as to function as a conductor to be connected to an electrode. In the same manner similar high conductive regions are made along kerf portions in a diode wafer, preventing each diode chip from being damaged on cutting.
    Type: Grant
    Filed: October 20, 1980
    Date of Patent: August 2, 1983
    Assignee: Matsushita Electric Industrial Company, Ltd.
    Inventors: Yoshimasa Ohki, Yukio Toyoda, Hiroyuki Kobayashi, Isamu Akasaki
  • Patent number: 3984263
    Abstract: A nitrogen-doped n-type epitaxial layer of GaP grown from a vapor phase is heated at a temperature ranging from 740.degree. to 1000.degree.C for a selected period of time depending on the temperature. The heat treatment is carried out in H.sub.2, N.sub.2 or Ar in the presence of Ga and P vapors. Alternatively, a protection coating of SiO.sub.2, Si.sub.3 N.sub.4 or Al.sub.2 O.sub.3 is formed on the epitaxial layer prior to the heat treatment.
    Type: Grant
    Filed: October 15, 1974
    Date of Patent: October 5, 1976
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Ichiro Asao, Yoshimasa Ohki, Isamu Akasaki, Masafumi Hashimoto