Abstract: A system for demodulation of phase shift keying signals with a bandpass filter tracked to input carrier frequency variation. This system provides means for detecting phase variations in the regenerated carrier wave from the demodulated signal, and means for controlling the phase of the regenerated carrier wave to compensate for the demodulation error owing to input carrier frequency variation.

Abstract: In an interference elimination device for use in a digital microwave communication system in which an interference component results from at least one different microwave communication system sharing a frequency band in common, a controller (21) controls a device input signal so that a controlled signal thereby produced may include a controlled component which is equal in amplitude to the interference component and be antiphase relative thereto. The controlled signal is subtracted from the device input signal to provide a difference signal which is free from the interference component. Together with the device input signal, the difference signal is supplied to a control signal producing circuit (41) for producing an amplitude and a phase control signal for the controller. Instead of the device input signal, an interference signal derived by causing the device input signal to pass through a narrow-band filter (11 or 12) may be delivered to the controller and the control signal producing circuit.

Abstract: The voltage controlled oscillator (VCO) in a phase-locked loop carrier recovery circuit is provided with two control signals, one based upon a phase error between the phase modulated carrier and VCO output and the other based upon a frequency error between the phase modulated carrier and VCO output.

Abstract: A digital multi-level multi-phase modulation system utilizes quaternary differential encoding and decoding of only the first two of N digital signal trains. A decision circuit is used to examine the frame pulses in one of the first two signal trains and in at least one of the remaining signal trains and generates output signals which can be used in a gate circuit to resolve the phase-lock ambiguity of the recovered carrier and thereby reproduce the original N signal trains.

Abstract: A phase synchronizing circuit for the demodulation of multi-phase PSK signals has a broadened capture frequency range while avoiding false capture. The circuit includes a phase synchronizing loop having a voltage controlled oscillator for generating a variable frequency output in response to a control voltage and a phase comparator for providing a comparison output representative of the phase difference between the output of the voltage controlled oscillator and an input signal. The comparison output serves as the control voltage for the voltage controlled oscillator. A phase-lock detection circuit is connected to the phase synchronizing loop to detect the phase-synchronized or unsynchronized states of the loop. A low frequency sweep generator is responsive to the phase-lock detection circuit for generating a variable-amplitude voltage which is supplied as a frequency sweep voltage to the voltage controlled oscillator.

Abstract: A synchronizing circuit for reproducing a synchronizing carrier wave from a received N-phase (N=2.sup.n, n being a positive real integer where n .gtoreq.1) PSK modulated carrier wave and employing a code converter circuit for adjusting the phase states of the received modulated carrier after demodulation thereof in order to enable the modulator to generate signals of the proper phase relation relative to an output carrier wave of a voltage controlled oscillator, which phase relationship is detected by a phase detector.The code converter may be a logic gating circuit having control inputs for changing the output levels or a plurality of branching circuit pairs for each input each pair having a true and complement branch, and switch means for selectively coupling one of the branches to an output associated with each pair of branch circuits.

Abstract: A phase synchronizing circuit for processing a 2.sup.n- phase phase modulated input signal wherein the signal is detected by phase detectors each of whose outputs are then phase shifted through a phase angle determined by the ratio of a:b = 1:tan (.pi./2.sup.n+1) where a represents the amplitude of the phase detector output and b represents the amplitude of a signal orthogonal to the signal a. The 2.sup.n phase shifted signals repetitively undergo frequency doubling and then a combined signal from each pair of doublers is generated to successively reduce the signals to 2.sup.n-1 in number, then 2.sup.n-2 in number, and so forth, until only one pair of signals remains. A difference signal of the pair of signals is formed, which difference signal represents an error signal and is employed to operate a voltage controlled oscillator serving as the signal to be compared at each phase detector with the input signal, after undergoing an appropriate phase shift.

Abstract: A variable delay equalizer comprises two directional couplers, each having a pair of input terminals and a pair of output terminals. A pair of variable phase shifters are inserted respectively between the output terminals of the first coupler and the input terminals of the second coupler. A third variable phase shifter is connected between the second output terminal of the second coupler and the second input terminal of the first coupler. This equalizer makes it possible to shift the peak delay frequency as well as to change the value of the peak delay itself.