Patents by Inventor Yoshimichi Sato

Yoshimichi Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9714213
    Abstract: A compound represented by general formula (1) a pharmaceutically acceptable salt thereof or a solvate thereof; wherein Ar represents an aryl group, or a 5- or 6-membered heteroaryl group containing a nitrogen atom, an oxygen atom or a sulfur atom; Y represents, for example, a hydrogen atom or a C1-C6 alkyl group; A represents a C1-C3 alkylene chain which may be substituted with two C1-C2 alkyl groups; X represents a hydrogen atom or a halogen atom; V represents an oxygen atom or a methylene chain; and R represents a group selected from the formulae below:
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: July 25, 2017
    Assignee: TOA EIYO LTD.
    Inventors: Kazuhiro Uemoto, Yoshimichi Sato, Naoki Okada, Emiko Iimori, Masayuki Kageyama
  • Publication number: 20160264514
    Abstract: Provided is a pharmaceutical agent containing a compound represented by general formula (1), a pharmaceutically acceptable salt thereof or a solvate thereof. A compound represented by general formula (1), a pharmaceutically acceptable salt thereof or a solvate thereof; wherein Ar represents an aryl group, or a 5- or 6-membered heteroaryl group containing a nitrogen atom, an oxygen atom or a sulfur atom; Y represents, for example, a hydrogen atom or a C1-C6 alkyl group; A represents a C1-C3 alkylene chain which may be substituted with two C1-C2 alkyl groups; X represents a hydrogen atom or a halogen atom; V represents an oxygen atom or a methylene chain; and R represents a group selected from the formulae below.
    Type: Application
    Filed: October 14, 2014
    Publication date: September 15, 2016
    Applicant: TOA EIYO LTD.
    Inventors: Kazuhiro UEMOTO, Yoshimichi SATO, Naoki OKADA, Emiko IIMORI, Masayuki KAGEYAMA
  • Patent number: 9290440
    Abstract: Provided is a pharmaceutical agent containing a compound represented by General Formula (1), a pharmaceutically acceptable salt thereof, or a solvate thereof: wherein A represents a C1-C3 linear alkylene group, in which one methylene group is optionally substituted with O or S; n represents an integer of from 3 to 5; X1 and X2 each independently represent CH or N; W1 and W2 each independently represent a carboxyl group or a tetrazolyl group; V represents a C1-C8 linear or branched alkylene group, in which one methylene group is optionally substituted with O or S; and R represents a substituted phenyl group, for example.
    Type: Grant
    Filed: April 15, 2013
    Date of Patent: March 22, 2016
    Assignee: TOA EIYO LTD.
    Inventors: Kazuhiro Uemoto, Yoshimichi Sato, Naoki Okada, Emiko Iimori, Masayuki Kageyama
  • Publication number: 20150119418
    Abstract: Provided is a pharmaceutical agent containing a compound represented by General Formula (1), a pharmaceutically acceptable salt thereof, or a solvate thereof: wherein A represents a C1-C3 linear alkylene group, in which one methylene group is optionally substituted with O or S; n represents an integer of from 3 to 5; X1 and X2 each independently represent CH or N; W1 and W2 each independently represent a carboxyl group or a tetrazolyl group; V represents a C1-C8 linear or branched alkylene group, in which one methylene group is optionally substituted with O or S; and R represents a substituted phenyl group, for example.
    Type: Application
    Filed: April 15, 2013
    Publication date: April 30, 2015
    Applicant: TOA EIYO LTD.
    Inventors: Kazuhiro Uemoto, Yoshimichi Sato, Naoki Okada, Emiko Iimori, Masayuki Kageyama
  • Patent number: 8953894
    Abstract: A pattern matching method for a scanning electron microscope comprises a step of performing pattern matching of only an upper layer pattern between an image (101) in which a pattern consisting of plural layers is represented and a template (104) in which the upper layer pattern of the plural layer pattern is selectively represented, thereby identifying the position of the pattern consisting of the plural layers. Then, information about the upper layer pattern is subtracted from the image (101), thus extracting shape information (108) about the lower layer pattern. Consequently, stable positioning or selective information extraction on a certain layer is enabled regardless of the state of the depths of a pattern formed in three dimensions or of the charge state of a sample.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: February 10, 2015
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yoshimichi Sato, Mitsuji Ikeda, Fumihiro Sasajima
  • Patent number: 8498489
    Abstract: The present invention provides a unified template matching technique which allows an adequate matching position to be provided even in an image with a distorted pattern shape and a variation in edge intensity. A correlation value contribution rate map is created for the vicinity of each of top candidate positions obtained by applying a centroid distance filter to a normalized correlation map resulting from template matching. A corrected intensity image is created from the correlation value contribution rate maps. Luminance correction is performed based on the corrected intensity image. Local matching is performed again on the vicinity of each candidate position. The candidates are then re-sorted based on candidate positions and correlation values newly obtained. Thus, even in an image with a distorted pattern shape and a variation in edge intensity, an adequate matching position can be provided in a unified manner.
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: July 30, 2013
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yuichi Abe, Mitsuji Ikeda, Yoshimichi Sato, Yasutaka Toyoda
  • Patent number: 8305435
    Abstract: The present invention achieves the process of easily registering a template which is prepared for a size change in pattern matching for specifying a measurement point, and high-speed pattern matching by which adequate position accuracy can be obtained in measurement. The present invention includes means for automatically calculating the size and position of a positioning template different from a measurement point itself when the measurement point is designated, to display a template having the calculated size and position. The present invention further includes means for performing pattern matching by using all or some of a plurality of divided templates and extracting templates having a similar positional relationship to the original positional relationship.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: November 6, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yoshimichi Sato, Mitsuji Ikeda, Fumihiro Sasajima
  • Patent number: 8139868
    Abstract: An inspection apparatus and method outputs an accurate matching position even if a search image contains a pattern similar to a template. An image search unit includes a relative position comparing unit which compares the relative position of a template in a template selection image with the relative position of a location currently being searched for in a search image and outputs the amount of position mismatch between the relative positions. A matching position determining unit determines a matching position by taking into consideration the amount of position mismatch in addition to search image similarity distribution information.
    Type: Grant
    Filed: August 20, 2008
    Date of Patent: March 20, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Yuichi Abe, Mitsuji Ikeda, Yoshimichi Sato, Yasutaka Toyoda
  • Publication number: 20110262043
    Abstract: A pattern matching method for a scanning electron microscope comprises a step of performing pattern matching of only an upper layer pattern between an image (101) in which a pattern consisting of plural layers is represented and a template (104) in which the upper layer pattern of the plural layer pattern is selectively represented, thereby identifying the position of the pattern consisting of the plural layers. Then, information about the upper layer pattern is subtracted from the image (101), thus extracting shape information (108) about the lower layer pattern. Consequently, stable positioning or selective information extraction on a certain layer is enabled regardless of the state of the depths of a pattern formed in three dimensions or of the charge state of a sample.
    Type: Application
    Filed: October 2, 2009
    Publication date: October 27, 2011
    Inventors: Yoshimichi Sato, Mitsuji Ikeda, Fumihiro Sasajima
  • Publication number: 20110110597
    Abstract: The present invention provides a unified template matching technique which allows an adequate matching position to be provided even in an image with a distorted pattern shape and a variation in edge intensity. A correlation value contribution rate map is created for the vicinity of each of top candidate positions obtained by applying a centroid distance filter to a normalized correlation map resulting from template matching. A corrected intensity image is created from the correlation value contribution rate maps. Luminance correction is performed based on the corrected intensity image. Local matching is performed again on the vicinity of each candidate position. The candidates are then re-sorted based on candidate positions and correlation values newly obtained. Thus, even in an image with a distorted pattern shape and a variation in edge intensity, an adequate matching position can be provided in a unified manner.
    Type: Application
    Filed: April 16, 2009
    Publication date: May 12, 2011
    Inventors: Yuichi Abe, Mitsuji Ikeda, Yoshimichi Sato, Yasutaka Toyoda
  • Publication number: 20090295914
    Abstract: The present invention achieves the process of easily registering a template which is prepared for a size change in pattern matching for specifying a measurement point, and high-speed pattern matching by which adequate position accuracy can be obtained in measurement. The present invention includes means for automatically calculating the size and position of a positioning template different from a measurement point itself when the measurement point is designated, to display a template having the calculated size and position. The present invention further includes means for performing pattern matching by using all or some of a plurality of divided templates and extracting templates having a similar positional relationship to the original positional relationship.
    Type: Application
    Filed: March 21, 2008
    Publication date: December 3, 2009
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Yoshimichi SATO, Mitsuji IKEDA, Fumihiro SASAJIMA
  • Publication number: 20090087103
    Abstract: There is provided an inspection apparatus and method that output an accurate matching position even if a search image contains a pattern similar to a template. An image search unit includes a relative position comparing unit which compares the relative position of a template in a template selection image with the relative position of a location currently being searched for in a search image and outputs the amount of position mismatch between the relative positions. A matching position determining unit determines a matching position by taking into consideration the amount of position mismatch in addition to search image similarity distribution information.
    Type: Application
    Filed: August 20, 2008
    Publication date: April 2, 2009
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Yuichi Abe, Mitsuji Ikeda, Yoshimichi Sato, Yasutaka Toyoda
  • Patent number: 6513131
    Abstract: A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing means provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also comprises comparison means for comparing a signal output of the synthesizing means with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: January 28, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Shoji Suzuki, Yoshimichi Sato, Korefumi Tashiro, Keisuke Bekki, Hiroshi Sato, Makoto Nohmi, Shinya Ohtsuji
  • Publication number: 20020029365
    Abstract: An information processing apparatus having a CPU, a memory and a memory controller. The CPU includes a burst access interface for rapidly transferring data, and a single access interface for partial write operations. The memory controller comprises two ECC controllers, one for burst access and the other for single access. Either burst access mode or single access mode can be selected, so that both ECC-based high reliability and a high-speed memory access capability are made available.
    Type: Application
    Filed: August 10, 2001
    Publication date: March 7, 2002
    Inventors: Yoshimichi Sato, Shoji Yoshida, Shigeya Tanaka, Takashi Hotta, Yuji Sugaya
  • Patent number: 6092217
    Abstract: A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing means provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also comprises comparison means for comparing a signal output of the synthesizing means with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.
    Type: Grant
    Filed: November 3, 1997
    Date of Patent: July 18, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Shoji Suzuki, Yoshimichi Sato, Korefumi Tashiro, Keisuke Bekki, Hiroshi Sato, Makoto Nohmi, Shinya Ohtsuji
  • Patent number: 5802266
    Abstract: A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing circuitry provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also compares the output signals having the superimposed inherent waveforms with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.
    Type: Grant
    Filed: October 14, 1994
    Date of Patent: September 1, 1998
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Shoji Suzuki, Yoshimichi Sato, Korefumi Tashiro, Keisuke Bekki, Hiroshi Sato, Makoto Nohmi, Shinya Ohtsuji
  • Patent number: 5612946
    Abstract: The same electrical device can be used in two modes, a simplex bus connection mode and a duplex bus connection mode, by collating signals output from two input and output ports for two electrical circuits in an electrical device with a comparator and detecting a fault in the electrical circuits in a duplex bus connection mode, and by checking whether a normal signal is output from an input and output port by collating a signal output from one input and output port for one of the two electrical circuits with the output signal fed back via another input and output port in a simplex bus connection mode.
    Type: Grant
    Filed: June 22, 1995
    Date of Patent: March 18, 1997
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyasu Kanekawa, Shoji Suzuki, Yoshimichi Sato, Shinya Ohtsuji
  • Patent number: 5428656
    Abstract: A method and apparatus for measuring fluorescent X-rays from a sample include an X-ray voltage tube having a variable applied voltage during the measurement cycle. The resulting fluorescent X-rays are measured by a detector that output representative signals. The representative signals are used to calculate a characteristic energy spectrum which can be displayed to an operator. The use of a varying voltage ensures detecting both light and heavy elements. An X-ray filter can also be inserted to prevent any characteristic X-rays from being generated from the X-ray gun itself.
    Type: Grant
    Filed: October 8, 1993
    Date of Patent: June 27, 1995
    Assignee: Horiba, Ltd.
    Inventors: Akimichi Kira, Yoshimichi Sato
  • Patent number: 5418826
    Abstract: The present invention provides a fluorescent X-ray qualitative analytical method of determining elements in a sample by preliminarily measuring a standard peak position corresponding to an energy position of fluorescent rays generated from each element expected in a sample. The standard peak positions are then stored. The sample is then radiated with X-rays to cause fluorescent X-rays to be generated from the elements in the sample. Spectral data is obtained from the fluorescent X-rays to determine the peak-generating positions from the spectral data and then a comparison is made with the stored standard peak positions to determine the elements contained in the sample.
    Type: Grant
    Filed: October 12, 1993
    Date of Patent: May 23, 1995
    Assignee: Horiba, Ltd.
    Inventors: Yoshimichi Sato, Akimichi Kira