Abstract: A communication apparatus is one of a plurality of communication apparatuses included in a communication system where a first communication apparatus transmits data via a transmission path in synchronization with communication by a second communication apparatus. The communication apparatus includes a switching element setting a signal level on the transmission path to a dominant level by being turned on; a driving circuit driving the switching element. and a control circuit giving an on command that instructs the driving circuit to turn the switching element on in response to an edge at which a signal level on the transmission path changes from a recessive level to a dominant level being detected. The driving circuit or the control circuit is further configured to shorten a delay time from when the edge is detected to when the switching element is turned on.

Abstract: In a power supply circuit having input and output terminals, an error amplifier has first and second paths independent of each other to output a control voltage, a first MOS transistor is interposed between the input terminal and an intermediate node, and a step-up section steps up a voltage supplied from the intermediate node and outputs the stepped-up voltage to the output terminal. The step-up section includes a capacitor, a second MOS transistor, a third MOS transistor, and a drive circuit. The first end of the capacitor is connected to the intermediate node. The second MOS transistor is interposed between the input terminal and a second end of the capacitor. The third MOS transistor is interposed between the second end of the capacitor and a ground. The drive circuit drives the second and third MOS transistors in a complementary manner based on a clock signal.

Abstract: In a power supply circuit having input and output terminals, an error amplifier has first and second paths independent of each other to output a control voltage, a first MOS transistor is interposed between the input terminal and an intermediate node, and a step-up section steps up a voltage supplied from the intermediate node and outputs the stepped-up voltage to the output terminal. The step-up section includes a capacitor, a second MOS transistor, a third MOS transistor, and a drive circuit. The first end of the capacitor is connected to the intermediate node. The second MOS transistor is interposed between the input terminal and a second end of the capacitor. The third MOS transistor is interposed between the second end of the capacitor and a ground. The drive circuit drives the second and third MOS transistors in a complementary manner based on a clock signal.

Abstract: In a power supply circuit, when switches are turned off, current flows from a battery power supply line through resistors, input terminals, diodes and a terminal and further from a terminal into IC. When a microcomputer operates in a low power consumption operating mode, the power supply voltage is higher than a target voltage, and a control voltage output from an operational amplifier increases, so that a transistor is turned off. At this time, a current sink circuit operates and a transistor is turned on, so that excessive current flows into the current sink circuit to suppress increase of the power supply voltage.

Abstract: When a control power source voltage becomes lower than an operation guarantee voltage level, the output of a start-up circuit assumes an H-level, a NOR gate produces an output shut-off signal of an L-level, and FETs are turned off. As the control power source voltage further decreases, the output shut-off control circuit loses stability in the operation. In this case, a resistor maintains the FETs in the OFF state due to its pull-down operation. As a result, the output of the output circuit is maintained in a high-impedance state over the whole range of control power source voltages lower than the operation guarantee voltage level.

Abstract: When a control power source voltage becomes lower than an operation guarantee voltage level, the output of a start-up circuit assumes an H-level, a NOR gate produces an output shut-off signal of an L-level, and FETs are turned off. As the control power source voltage further decreases, the output shut-off control circuit loses stability in the operation. In this case, a resistor maintains the FETs in the OFF state due to its pull-down operation. As a result, the output of the output circuit is maintained in a high-impedance state over the whole range of control power source voltages lower than the operation guarantee voltage level.

Abstract: A power voltage of a power source circuit is produced by amplifying a threshold voltage difference of an operational amplifier by an amplification factor corresponding to a dividing ratio of a resistance dividing circuit. The power source circuit is integrated on a CMOS substrate together with a computer block. A plurality of analog switches are associated with the resistance dividing circuit to stabilize the power voltage of the power source circuit. One of these switches is selectively closed to change the dividing ratio of the resistance dividing circuit in accordance with actuation data stored in a control register.