Patents by Inventor Yoshinobu Nakatani
Yoshinobu Nakatani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10840435Abstract: Provided are a magnetic tunnel junction device and a magnetic resistance memory device which are capable of both reducing a write current and increasing a write speed. The magnetic tunnel junction device includes a free layer having a first magnetization direction that is changeable, a pinned layer that is configured to maintain a second magnetization direction in a predetermined direction, and an insulating layer between the free layer and the pinned layer. The free layer includes a first free layer having perpendicular magnetic anisotropy and high polarizability, and a second free layer that is antiferromagnetic-coupled to the first free layer.Type: GrantFiled: July 31, 2019Date of Patent: November 17, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yoshiaki Sonobe, Yoshinobu Nakatani
-
Publication number: 20200144482Abstract: Provided are a magnetic tunnel junction device and a magnetic resistance memory device which are capable of both reducing a write current and increasing a write speed. The magnetic tunnel junction device includes a free layer having a first magnetization direction that is changeable, a pinned layer that is configured to maintain a second magnetization direction in a predetermined direction, and an insulating layer between the free layer and the pinned layer. The free layer includes a first free layer having perpendicular magnetic anisotropy and high polarizability, and a second free layer that is antiferromagnetic-coupled to the first free layer.Type: ApplicationFiled: July 31, 2019Publication date: May 7, 2020Inventors: Yoshiaki Sonobe, Yoshinobu Nakatani
-
Patent number: 8345473Abstract: The present invention uses a ferromagnetic thin wire having a domain wall inside, with the magnetic moment at the center thereof being perpendicular to the longitudinal axis of the thin wire. With the domain wall being fixed by a domain wall fixation device (e.g. antiferromagnetic thin wires) so that the domain wall is prevented from moving in the ferromagnetic thin wire, when a direct current is supplied, the magnetic moment rotates in the immobilized domain wall. This rotation of the moment can be detected by a TMR element or the like. This configuration of the ferromagnetic thin wire element can be directly used to create a microwave oscillator or magnetic memory.Type: GrantFiled: April 21, 2008Date of Patent: January 1, 2013Assignees: Kyoto University, University of Electro-CommunicationsInventors: Teruo Ono, Yoshinobu Nakatani
-
Patent number: 7952915Abstract: A novel element capable of simply controlling an in-plane rotational motion of a core (a rising spot of a magnetization) generated in the center of a ferromagnetic dot made by forming a ferromagnetic material into a nanosized disk shape is provided. In addition, a binary information memory element using a core, including a ferromagnetic dot, made of a disk-shaped ferromagnetic material, with a magnetic structure of a magnetic vortex structure, and a current supplier for supplying an alternating current with a predetermined alternating current in the radial direction of the ferromagnetic dot is provided. In the case where the frequency of the current resonates with the intrinsic frequency of the ferromagnetic dot, it is possible to rotate the core in the plane of the dot. Since the core leaks a magnetic field, a microscopic actuator such as a motor can be obtained by using this element. Furthermore, supplying a current having a density not less than a predetermined value reverses the core.Type: GrantFiled: March 1, 2007Date of Patent: May 31, 2011Assignees: Kyoto University, The University of Electro-Communications, Osaka University, Tokyo Metropolitan UniversityInventors: Teruo Ono, Shinya Kasai, Kensuke Kobayashi, Yoshinobu Nakatani, Hiroshi Kohno, Gen Tatara
-
Publication number: 20110069541Abstract: The present invention uses a ferromagnetic thin wire having a domain wall inside, with the magnetic moment at the center thereof being perpendicular to the longitudinal axis of the thin wire. With the domain wall being fixed by a domain wall fixation device (e.g. antiferromagnetic thin wires) so that the domain wall is prevented from moving in the ferromagnetic thin wire, when a direct current is supplied, the magnetic moment rotates in the immobilized domain wall. This rotation of the moment can be detected by a TMR element or the like. This configuration of the ferromagnetic thin wire element can be directly used to create a microwave oscillator or magnetic memory.Type: ApplicationFiled: April 21, 2008Publication date: March 24, 2011Applicants: KYOTO UNIVERSITY, THE UNIVERSITY OF ELECTRO-COMMUNICATIONSInventors: Teruo Ono, Yoshinobu Nakatani
-
Patent number: 7630231Abstract: A magnetoresistive hybrid memory cell includes first and second stacked structures. The first stacked structure includes a magnetic tunnel junction including first and second magnetic regions stacked in a parallel, overlying relationship separated by a layer of non-magnetic material, wherein the first magnetic region has a fixed first magnetic moment vector and the second magnetic region has a free second magnetic moment vector that is switchable between the same and opposite directions with respect to the fixed first magnetic moment vector. The second stacked structure is at least partly arranged in a lateral relationship with respect to the first stacked structure and includes a third magnetic region having a fixed third magnetic moment vector and the second magnetic region. The first and second structures are arranged between at least two electrodes in electrical contact therewith.Type: GrantFiled: August 27, 2007Date of Patent: December 8, 2009Assignees: Infineon Technologies AG, Altis Semiconductor S.N.C., Centre National de la Recherche Scientifique, Universite Paris-SudInventors: Jacques Miltat, Yoshinobu Nakatani, Ulrich Klostermann
-
Publication number: 20090180311Abstract: The present invention provides a novel element capable of simply controlling an in-plane rotational motion of a core (a rising spot of a magnetization) generated in the center of a ferromagnetic dot made by forming a ferromagnetic material into a nanosized disk shape. In addition, the present invention is achieved to provide a binary information memory element using a core, including a ferromagnetic dot, made of a disk-shaped ferromagnetic material, with a magnetic structure of a magnetic vortex structure, and a current supplier for supplying an alternating current with a predetermined alternating current in the radial direction of the ferromagnetic dot. In the case where the frequency of the current resonates with the intrinsic frequency of the ferromagnetic dot, it is possible to rotate the core in the plane of the dot. Since the core leaks a magnetic field, a microscopic actuator such as a motor can be obtained by using this element.Type: ApplicationFiled: March 1, 2007Publication date: July 16, 2009Applicants: Kyoto University, The University of Electro-Communications, Osaka University, Tokyo Metropolitan UniversityInventors: Teruo Ono, Shinya Kasai, Kensuke Kobayashi, Yoshinobu Nakatani, Hiroshi Kohno, Gen Tatara
-
Publication number: 20080094881Abstract: A magnetoresistive hybrid memory cell includes first and second stacked structures. The first stacked structure includes a magnetic tunnel junction including first and second magnetic regions stacked in a parallel, overlying relationship separated by a layer of non-magnetic material, wherein the first magnetic region has a fixed first magnetic moment vector and the second magnetic region has a free second magnetic moment vector that is switchable between the same and opposite directions with respect to the fixed first magnetic moment vector. The second stacked structure is at least partly arranged in a lateral relationship with respect to the first stacked structure and includes a third magnetic region having a fixed third magnetic moment vector and the second magnetic region. The first and second structures are arranged between at least two electrodes in electrical contact therewith.Type: ApplicationFiled: August 27, 2007Publication date: April 24, 2008Applicants: INFINEON TECHNOLOGIES AG, ALTIS SEMICONDUCTOR S.N.C., CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE (CNRS), UNIVERSITE PARIS-SUDInventors: Jacques Miltat, Yoshinobu Nakatani, Ulrich Klostermann
-
Patent number: 7315467Abstract: The present invention relates to a magnetoresistive hybrid memory cell comprising a first stacked structure comprising a magnetic tunnel junction including first and second magnetic regions stacked in a parallel, overlying relationship separated by a layer of non-magnetic material, wherein said first magnetic region being provided with a fixed first magnetic moment vector and said second magnetic region being provided with a free second magnetic moment vector which is free to be switched between the same and opposite directions with respect to said fixed first magnetic moment vector of said first magnetic region, a second stacked structure being at least partly arranged in a lateral relationship as to said first stacked structure and comprising a third magnetic region being provided with a fixed third magnetic moment vector and said second magnetic region; wherein said first and second structures being arranged in between at least two electrodes in electrical contact therewith.Type: GrantFiled: December 11, 2006Date of Patent: January 1, 2008Assignees: Infineon Technologies AG, Altis Semiconductor SNC, Centre National de la Recherche Scientifique (CNRS), Universite Paris-SUDInventors: Jacques Miltat, Yoshinobu Nakatani
-
Publication number: 20070081382Abstract: The present invention relates to a magnetoresistive hybrid memory cell comprising a first stacked structure comprising a magnetic tunnel junction including first and second magnetic regions stacked in a parallel, overlying relationship separated by a layer of non-magnetic material, wherein said first magnetic region being provided with a fixed first magnetic moment vector and said second magnetic region being provided with a free second magnetic moment vector which is free to be switched between the same and opposite directions with respect to said fixed first magnetic moment vector of said first magnetic region, a second stacked structure being at least partly arranged in a lateral relationship as to said first stacked structure and comprising a third magnetic region being provided with a fixed third magnetic moment vector and said second magnetic region; wherein said first and second structures being arranged in between at least two electrodes in electrical contact therewith.Type: ApplicationFiled: December 11, 2006Publication date: April 12, 2007Inventors: Jacques Miltat, Yoshinobu Nakatani
-
Publication number: 20060146598Abstract: The present invention relates to a magnetoresistive hybrid memory cell comprising a first stacked structure comprising a magnetic tunnel junction including first and second magnetic regions stacked in a parallel, overlying relationship separated by a layer of non-magnetic material, wherein said first magnetic region being provided with a fixed first magnetic moment vector and said second magnetic region being provided with a free second magnetic moment vector which is free to be switched between the same and opposite directions with respect to said fixed first magnetic moment vector of said first magnetic region, a second stacked structure being at least partly arranged in a lateral relationship as to said first stacked structure and comprising a third magnetic region being provided with a fixed third magnetic moment vector and said second magnetic region; wherein said first and second structures being arranged in between at least two electrodes in electrical contact therewith.Type: ApplicationFiled: January 24, 2006Publication date: July 6, 2006Inventors: Jacques Miltat, Yoshinobu Nakatani
-
Publication number: 20060146601Abstract: A magnetoresistive hybrid memory cell includes first and second stacked structures. The first stacked structure includes a magnetic tunnel junction including first and second magnetic regions stacked in a parallel, overlying relationship separated by a layer of non-magnetic material, wherein the first magnetic region has a fixed first magnetic moment vector and the second magnetic region has a free second magnetic moment vector that is switchable between the same and opposite directions with respect to the fixed first magnetic moment vector. The second stacked structure is at least partly arranged in a lateral relationship with respect to the first stacked structure and includes a third magnetic region having a fixed third magnetic moment vector and the second magnetic region. The first and second structures are arranged between at least two electrodes in electrical contact therewith.Type: ApplicationFiled: December 30, 2004Publication date: July 6, 2006Inventors: Jacques Miltat, Yoshinobu Nakatani
-
Patent number: 7061797Abstract: A magnetoresistive hybrid memory cell includes first and second stacked structures. The first stacked structure includes a magnetic tunnel junction including first and second magnetic regions stacked in a parallel, overlying relationship separated by a layer of non-magnetic material, wherein the first magnetic region has a fixed first magnetic moment vector and the second magnetic region has a free second magnetic moment vector that is switchable between the same and opposite directions with respect to the fixed first magnetic moment vector. The second stacked structure is at least partly arranged in a lateral relationship with respect to the first stacked structure and includes a third magnetic region having a fixed third magnetic moment vector and the second magnetic region. The first and second structures are arranged between at least two electrodes in electrical contact therewith.Type: GrantFiled: December 30, 2004Date of Patent: June 13, 2006Assignees: Infineon Technologies AG, Altis SemiconductorInventors: Jacques Miltat, Yoshinobu Nakatani