Patents by Inventor Yoshinobu Sato

Yoshinobu Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080117307
    Abstract: An image capture apparatus capable of generating a mirror image of a captured image and superimposing character patterns on the mirror image. The image capture apparatus includes an image capture device and a display device. The display device is rotatably coupled to the image capture device such that the display device can rotate between a normal position and self-portrait position. When in the self-portrait position, the display device displays a mirror image of the captured image, a superimposed character pattern, and an operation condition pattern. Furthermore, the image capture apparatus includes operation devices that are inhibited from operating by a user when in the self-portrait mode.
    Type: Application
    Filed: January 28, 2008
    Publication date: May 22, 2008
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Yoshinobu Sato
  • Patent number: 7342283
    Abstract: An object of the present invention is to provide a semiconductor device which enables to reduce the device area, while securing the breakdown voltage between the drain and the source of each MOS transistor for the semiconductor device including plural MOS transistors, which are arrayed adjacently each other, with different types of channel conductivity.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: March 11, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisao Ichijo, Hiroyoshi Ogura, Yoshinobu Sato, Teruhisa Ikuta, Toru Terashita
  • Patent number: 7335549
    Abstract: An N-channel transistor includes: an N-type source region, a gate electrode, a P-type body region, an N-type drain offset region, and a drain contact region, which is an N-type drain region. The transistor further includes a gate insulating film that has a thin oxide silicon film (a thin film portion) and a LOCOS film (a thick film portion). The body region has an impurity profile in which the concentration reaches a maximum value near the surface and decreases with distance from the surface. The drain offset region has an impurity profile that has an impurity-concentration peak in a deep portion located a certain depth-extent below the lower face of the LOCOS film.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: February 26, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Osamu Matsui, Yoshinobu Sato
  • Patent number: 7323747
    Abstract: In a high voltage P-channel MOS transistor formed on a silicon-on-insulator (SOI) substrate, a P+-type source region (8), an N-type body region (4) and an N+-body contact diffusion region (10) are surrounded by a P+-type drain region (9) and a P-type drift region (5). A gate electrode (7) is formed to overlap the end portion of the N-type body region (4). The end portion of the N-type body region (4) has a portion in which the gate electrode (7) and the P+-type source region (8) are not adjacent to each other.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: January 29, 2008
    Assignee: Matsushita Electric Industrial, Co., Ltd.
    Inventors: Teruhisa Ikuta, Hiroyoshi Ogura, Yoshinobu Sato, Toru Terashita
  • Publication number: 20070285521
    Abstract: An image sensing apparatus according to the present invention includes: an image sensing unit configured to sense an object image and output image signals; a shift amount detecting unit configured to detect a shift amount between two image signals, from the image signals that are sequentially output by the image sensing unit; an image signal synthesizing unit configured to sequentially synthesize the image signals based on detection results of the shift amount detecting unit, and generate a synthesized image signal that has been corrected by the shift amount; and a memory unit configured to accumulate the synthesized image signal, wherein the image signal synthesizing unit performs level adjustment of a signal level, the level adjustment varying for each area of the two image signals that are to be synthesized, and generates the synthesized image signal.
    Type: Application
    Filed: May 18, 2007
    Publication date: December 13, 2007
    Inventors: Yoshinori Watanabe, Yoshihiro Honma, Yoshinobu Sato, Masato Kosugi
  • Patent number: 7257871
    Abstract: According to the present invention, for a dead human body in which the blood contains a predetermined ratio or more of bilirubin, which causes discoloration of the body, before the primary embalmment processing employing the perfusion type antiseptic fixing method using a formalin solution, the body is cleaned with an antiseptic solution, and the preliminary processing is performed. Specifically, a photo catalyst embalming solution containing a photo catalyst is injected into the vessels of the body, and after the photo catalyst embalming solution has been distributed to the capillaries in the dermis of portions of the body for which discoloration is to be prevented, the portions are irradiated by an electromagnetic wave (e.g., UV) to induce photo catalytic activity to locally, at the least, decompose bilirubin and reduce the amount in the body portions. As a result, the appearance of a body in a special state, wherein the amount of bilirubin is excessive, can be maintained so it is as natural as possible.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: August 21, 2007
    Assignees: Kabushiki Kaisha Sunseal, Asukatec Co., Ltd., Yoshinobu Sato, San Holdings Inc.
    Inventors: Kohei Aoyagi, Yoshinobu Sato, Shinichiro Ishida
  • Patent number: 7238987
    Abstract: A high withstand voltage lateral semiconductor device capable of improving its on-state breakdown voltage and safe operation area (SOA) without lowering its current capabilities, and structured so as to be easy to produce.
    Type: Grant
    Filed: October 4, 2005
    Date of Patent: July 3, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Teruhisa Ikuta, Hiroyoshi Ogura, Yoshinobu Sato, Hisao Ichijo
  • Publication number: 20070103722
    Abstract: The image rotation apparatus includes a first storage unit adapted to store compressed image data, and a decompression unit adapted to decompress the image data read out from the first storage unit, and segments the image data obtained from the decompression unit into a plurality of areas. The apparatus further includes a second storage unit adapted to sequentially perform a rotation process on the image data of segmented area, and store the rotated image data, a compression unit adapted to compress the image data of each area read out from the second storage unit, and a third storage unit adapted to sequentially store the image data of each area obtained from the compression unit. There is provided the image data processing apparatus having the above configuration, which rotates the image data while reducing the storage capacity of the buffer memory for storing the image data.
    Type: Application
    Filed: November 8, 2006
    Publication date: May 10, 2007
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: YOSHINOBU SATO
  • Publication number: 20070075393
    Abstract: In a high voltage P-channel MOS transistor formed on a silicon-on-insulator (SOI) substrate, a P+-type source region (8), an N-type body region (4) and an N+-body contact diffusion region (10) are surrounded by a P+-type drain region (9) and a P-type drift region (5). A gate electrode (7) is formed to overlap the end portion of the N-type body region (4). The end portion of the N-type body region (4) has a portion in which the gate electrode (7) and the P+-type source region (8) are not adjacent to each other.
    Type: Application
    Filed: July 18, 2006
    Publication date: April 5, 2007
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Teruhisa Ikuta, Hiroyoshi Ogura, Yoshinobu Sato, Toru Terashita
  • Publication number: 20070044288
    Abstract: According to the present invention, for a dead human body in which the blood contains a predetermined ratio or more of bilirubin, which causes discoloration of the body, before the primary embalmment processing employing the perfusion type antiseptic fixing method using a formalin solution, the body is cleaned with an antiseptic solution, and the preliminary processing is performed. Specifically, a photo catalyst embalming solution containing a photo catalyst is injected into the vessels of the body, and after the photo catalyst embalming solution has been distributed to the capillaries in the dermis of portions of the body for which discoloration is to be prevented, the portions are irradiated by an electromagnetic wave (e.g., UV) to induce photo catalytic activity to locally, at the least, decompose bilirubin and reduce the amount in the body portions. As a result, the appearance of a body in a special state, wherein the amount of bilirubin is excessive, can be maintained so it is as natural as possible.
    Type: Application
    Filed: September 30, 2005
    Publication date: March 1, 2007
    Inventors: Kohei Aoyagi, Yoshinobu Sato, Shinichiro Ishida
  • Patent number: 7157772
    Abstract: A gate electrode has an end extended over a part of a LOCOS oxide film, and a source electrode has an end extended further than the end of the gate electrode over a part of the LOCOS oxide film. An insulating film covering the gate electrode and the LOCOS oxide film is formed such that the thickness of the insulating film at an end-portion region, which is on an end portion of the gate electrode provided to extend over a part of the LOCOS oxide film, as viewed from a main surface of a supporting substrate, is smaller than the thickness of the insulating film below an end portion of the source electrode above the drain region and smaller than the thickness of the insulating film on an end portion of the gate electrode above a body region.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: January 2, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroyoshi Ogura, Hisao Ichijo, Yoshinobu Sato, Teruhisa Ikuta
  • Publication number: 20060268001
    Abstract: An image processing apparatus and method converts a moving image signal into an image data format consisting of a luminance signal and a color-difference signal like that of the YUV format at a signal processing circuit 4, compression-encodes the image data at a compression circuit 10 and records it on a recording medium 11, in addition to reducing the same-format image data color-difference signal to generate image data for display, enabling the image processing apparatus for recording a moving image to achieve moving image recording of a quality that is good enough to be used as still images.
    Type: Application
    Filed: May 30, 2006
    Publication date: November 30, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventor: Yoshinobu Sato
  • Publication number: 20060255406
    Abstract: An object of the present invention is to provide a semiconductor device which enables to reduce the device area, while securing the breakdown voltage between the drain and the source of each MOS transistor for the semiconductor device including plural MOS transistors, which are arrayed adjacently each other, with different types of channel conductivity.
    Type: Application
    Filed: March 8, 2006
    Publication date: November 16, 2006
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hisao Ichijo, Hiroyoshi Ogura, Yoshinobu Sato, Teruhisa Ikuta, Toru Terashita
  • Publication number: 20060220130
    Abstract: A high breakdown voltage semiconductor device is formed using an SOI substrate comprising a support substrate, an insulating film, and an active layer. The high breakdown voltage semiconductor device comprises an N-type well region and a P-type drain offset region formed on the active layer, a P-type source region formed on the well region, a P-type drain region formed on the drain offset region, a gate insulating film formed in at least a region interposed between the source region and the drain offset region of the active layer, and a gate electrode formed on the gate insulating film. The device further comprises an N-type deep well region formed under the drain offset region. A concentration peak of N-type impurity for formation of the deep well region is located deeper than a concentration peak of P-type impurity for formation of the drain offset region.
    Type: Application
    Filed: February 27, 2006
    Publication date: October 5, 2006
    Inventors: Yoshinobu Sato, Hiroyoshi Ogura, Hisao Ichijo, Teruhisa Ikuta, Toru Terashita
  • Patent number: 7107721
    Abstract: The door apparatus has a linear motor for applying a thrust to move a door, a lock device for performing a locking operation and an unlocking operation, and a control unit for controlling the linear motor and the lock device. Upon determining that the lock device is still in a locked state after a set time has elapsed from initiation of the unlocking operation, the control unit controls the linear motor to apply a thrust force to the door while again controlling the lock device to perform the unlocking operation. As a result, even when the locking pin and the lock hole are misaligned to such an extent as to interfere with the unlocking operation, the unlocking operation can be performed without an increase in a thrust output by a solenoid of the lock device, the solenoid can be prevented from overheating and the size and weight of the solenoid can be reduced.
    Type: Grant
    Filed: August 25, 2003
    Date of Patent: September 19, 2006
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Yoshinobu Sato
  • Publication number: 20060202240
    Abstract: Provided is a semiconductor device which includes a conductive bonding pad formed on a semiconductor substrate of the first conduction type via an insulating film and a diffusion layer of the second conduction type formed on a surface of the semiconductor substrate under the bonding pad. Characteristics do not deteriorate even when a breakdown occurs during wire bonding.
    Type: Application
    Filed: February 17, 2006
    Publication date: September 14, 2006
    Applicant: Matsushita Electric Industrial Co., LTD.
    Inventors: Teruhisa Ikuta, Hiroyoshi Ogura, Yoshinobu Sato, Toru Terashita, Hisao Ichijo
  • Patent number: 7064505
    Abstract: A method and system for controlling vehicle door position having reduced power supply current requirements reduces the cost and weight of a vehicle and further reduces power consumption. The vehicle door control system includes an inverter for converting a DC power source to an AC voltage for driving the motor. The inverter is preceded by a boost converter that maintains a constant voltage at the inverter input, and a capacitor is provided between the converter and inverter for energy storage. Kinetic energy is returned from the door and mechanical portions of the motor through the inverter and stored on the capacitor, reducing the power required from the power source. Operation of the inverter and converter are controlled by timers and detection mechanisms that cease operation of the inverter and converter when the door is held in a fully closed or open position for a predetermined interval.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: June 20, 2006
    Assignee: Fuji Electric System Co., Ltd.
    Inventor: Yoshinobu Sato
  • Publication number: 20060118902
    Abstract: A high withstand voltage lateral semiconductor device capable of improving its on-state breakdown voltage and safe operation area (SOA) without lowering its current capabilities, and structured so as to be easy to produce.
    Type: Application
    Filed: October 4, 2005
    Publication date: June 8, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Teruhisa Ikuta, Hiroyoshi Ogura, Yoshinobu Sato, Hisao Ichijo
  • Patent number: 7046833
    Abstract: From CT images having captured an abdomen, a two-dimensional characteristic space is assumed, in which X and Y axes indicate CT values of image data taken in first and second time phases different from each other. In this space, a two-dimensional histogram concerning respective pixels located at the same position in the two time phases is taken as a sample distribution of pixels. A two-variable distribution function is applied to this sample distribution, so as to estimate a matrix distribution of pixels corresponding to the whole liver region. According to this matrix distribution, a range of CT value of pixels corresponding to the liver region is estimated.
    Type: Grant
    Filed: May 21, 2002
    Date of Patent: May 16, 2006
    Assignee: AZE Ltd.
    Inventors: Jun Masumoto, Yoshinobu Sato, Masatoshi Hori, Takamichi Murakami, Takeshi Johkoh, Hironobu Nakamura, Shinichi Tamura, Masaki Miyamoto
  • Publication number: 20060067584
    Abstract: An image forming apparatus and method capable of decompressing and compressing image data. More specifically, the apparatus and method include decompressing first compressed image data, processing the decompressed image data, selecting from among a plurality of quantization tables a quantization table providing a compression ratio lower than a compression ratio of the first compressed image data, and compressing the processed image data.
    Type: Application
    Filed: September 20, 2005
    Publication date: March 30, 2006
    Applicant: Canon Kabushiki Kaisha
    Inventor: Yoshinobu Sato