Patents by Inventor Yoshio Homma
Yoshio Homma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150031321Abstract: An example of a triage tag management includes a triage tag attached to a wounded person, a smartphone that receives input of symptom data of the wounded person, determines a symptom level of the wounded person, and transmits data of the symptom level to the triage tag, and a wounded person information database that receives the symptom level data of the wounded person from the smartphone over a network and stores the symptom level data therein for each wounded person attached with the triage tag, the smartphone including a temporary storage section that temporarily stores the symptom level data of the wounded person when the symptom level data cannot be transmitted to the wounded person information database.Type: ApplicationFiled: June 7, 2012Publication date: January 29, 2015Applicant: TOKYO ELECTRONIC SYSTEMS CORPORATIONInventors: Yasushi Nakamori, Hideshige Tanaka, Akira Ito, Tomoko Nakamaru, Kyosuke Kachi, Yoshio Homma
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Patent number: 8129275Abstract: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.Type: GrantFiled: February 5, 2010Date of Patent: March 6, 2012Assignee: Renesas Electronics CorporationInventors: Naofumi Ohashi, Junji Noguchi, Toshinori Imai, Hizuru Yamaguchi, Nobuo Owada, Kenji Hinode, Yoshio Homma, Seiichi Kondo
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Publication number: 20100136786Abstract: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.Type: ApplicationFiled: February 5, 2010Publication date: June 3, 2010Inventors: Naofumi Ohashi, Junji Noguchi, Toshinori Imai, Hizuru Yamaguchi, Nobuo Owada, Kenji Hinode, Yoshio Homma, Seiichi Kondo
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Patent number: 7659201Abstract: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.Type: GrantFiled: May 27, 2008Date of Patent: February 9, 2010Assignee: Renesas Technology Corp.Inventors: Naofumi Ohashi, Junji Noguchi, Toshinori Imai, Hizuru Yamaguchi, Nobuo Owada, Kenji Hinode, Yoshio Homma, Seiichi Kondo
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Patent number: 7563716Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items such as slurries and polishing pads is reduced. A metal film formed on an insulating film comprising a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.Type: GrantFiled: March 29, 2007Date of Patent: July 21, 2009Assignee: Renesas Technology Corp.Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode
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Patent number: 7510970Abstract: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.Type: GrantFiled: February 21, 2006Date of Patent: March 31, 2009Assignee: Renesas Technology Corp.Inventors: Naofumi Ohashi, Junji Noguchi, Toshinori Imai, Hizuru Yamaguchi, Nobuo Owada, Kenji Hinode, Yoshio Homma, Seiichi Kondo
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Publication number: 20080233736Abstract: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.Type: ApplicationFiled: May 27, 2008Publication date: September 25, 2008Inventors: Naofumi Ohashi, Junji Noguchi, Toshinori Imai, Hizuru Yamaguchi, Nobuo Owada, Kenji Hinode, Yoshio Homma, Seiichi Kondo
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Patent number: 7279425Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items such as slurries and polishing pads is reduced. A metal film formed on an insulating film comprising a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.Type: GrantFiled: October 17, 2006Date of Patent: October 9, 2007Assignee: Hitachi, Ltd.Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode
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Publication number: 20070167015Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items such as slurries and polishing pads is reduced. A metal film formed on an insulating film comprising a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.Type: ApplicationFiled: March 29, 2007Publication date: July 19, 2007Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode
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Patent number: 7183212Abstract: Described is a polishing technique adapted for multilevel metallization of an electronic circuit device, which comprises polishing a metal film with a polishing liquid containing an oxidizing substance, a phosphoric acid and a protection-layer forming agent. The present invention makes it possible to polishing a metal film at a high removal rate while suppressing occurrence of scratches, delamination, dishing or erosion.Type: GrantFiled: July 26, 2004Date of Patent: February 27, 2007Assignee: Renesas Technology Corp.Inventors: Seiichi Kondo, Masaaki Fujimori, Noriyuki Sakuma, Yoshio Homma
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Publication number: 20070029285Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items such as slurries and polishing pads is reduced. A metal film formed on an insulating film comprising a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.Type: ApplicationFiled: October 17, 2006Publication date: February 8, 2007Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode
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Patent number: 7132367Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items such as slurries and polishing pads is reduced A metal film formed on an insulating film comprising a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.Type: GrantFiled: May 20, 2003Date of Patent: November 7, 2006Assignee: Hitachi, Ltd.Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode
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Publication number: 20060141792Abstract: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP). method, a process for manufacturing. a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.Type: ApplicationFiled: February 21, 2006Publication date: June 29, 2006Inventors: Naofumi Ohashi, Junji Noguchi, Toshinori Imai, Hizuru Yamaguchi, Nobuo Owada, Kenji Hinode, Yoshio Homma, Seiichi Kondo
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Patent number: 7026245Abstract: In order to polish an insulating film, a cerium oxide polishing agent (ceria slurry) is used. The ceria slurry is composed of cerium oxide powder containing Na, Ca, Fe, and Cr concentration of which is less than 10 ppm. Fragile inorganic and organic insulating films formed at relatively low temperatures can be polished without degrading the characteristics of the semiconductor element due to Na diffusion.Type: GrantFiled: April 7, 2003Date of Patent: April 11, 2006Assignee: Renesas Technology Corp.Inventors: Yoshio Homma, Kikuo Kusukawa, Shigeo Moriyama, Masayuki Nagasawa
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Publication number: 20050170760Abstract: In a polishing apparatus having a cover body with fluid pressing mechanism, during polishing, vibration and migration of sticking portion between a retainer and a membrane generated in downstream of rotation of a polishing platen is prevented by reducing sticking force between the retainer and the membrane to less than force needed to wafer polishing with rotation of the cover body.Type: ApplicationFiled: April 4, 2005Publication date: August 4, 2005Inventors: Yoshio Homma, Seiichi Kondo, Noriyuki Sakuma, Youhei Yamada, Takeshi Kimura, Hiroki Nezu
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Patent number: 6899603Abstract: In a polishing apparatus having a cover body with fluid pressing mechanism, during polishing, vibration and migration of sticking portion between a retainer and a membrane generated in downstream of rotation of a polishing platen is prevented by reducing sticking force between the retainer and the membrane to less than force needed to wafer polishing with rotation of the cover body.Type: GrantFiled: February 2, 2004Date of Patent: May 31, 2005Assignee: Renesas Technology Corp.Inventors: Yoshio Homma, Seiichi Kondo, Noriyuki Sakuma, Youhei Yamada, Takeshi Kimura, Hiroki Nezu
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Publication number: 20050074967Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items such as slurries and polishing pads is reduced A metal film formed on an insulating film comprising a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.Type: ApplicationFiled: May 20, 2003Publication date: April 7, 2005Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode
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Patent number: 6855035Abstract: The apparatus and method for producing a substrate having a substrate surface by polishing the substrate surface, which includes a metallic wire. A polishing liquid is supplied a clearance between the substrate surface and the surface of a polishing pad. The polishing liquid includes an acid which dissolves the oxidized part of the substrate surface and is substantially free of solid abrasive powder. A relative movement is generated between the substrate surface and the polishing pad surface while the substrate surface is pressed against the polishing pad surface while the polishing liquid is supplied so that the dissolved oxidized part of the substrate surface can be removed from the substrate.Type: GrantFiled: August 8, 2002Date of Patent: February 15, 2005Assignee: Renesas Technology Corp.Inventors: Yoshio Homma, Noriyuki Sakuma, Naofumi Ohashi, Toshinori Imai
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Publication number: 20040266188Abstract: Described is a polishing technique adapted for multilevel metallization of an electronic circuit device, which comprises polishing a metal film with a polishing liquid containing an oxidizing substance, a phosphoric acid and a protection-layer forming agent. The present invention makes it possible to polishing a metal film at a high removal rate while suppressing occurrence of scratches, delamination, dishing or erosion.Type: ApplicationFiled: July 26, 2004Publication date: December 30, 2004Applicant: RENESAS TECHNOLOGY CORP.Inventors: Seiichi Kondo, Masaaki Fujimori, Noriyuki Sakuma, Yoshio Homma
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Publication number: 20040229468Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items such as slurries and polishing pads is reduced. A metal film formed on an insulating film comprising a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.Type: ApplicationFiled: April 16, 2004Publication date: November 18, 2004Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode