Abstract: A method of making a thin film transistor device, including forming and patterning a semiconductor film to form first and second semiconductor films in, respectively, low-voltage driven and high-voltage driven thin film transistor formation regions. The method also includes forming a first insulating film on the first and second semiconductor films, and forming a first gate electrode on the first insulating film in the low-voltage driven thin film transistor formation region. Additionally, a second insulating film is formed on the entire surface of the resultant structure above the substrate, and a second gate electrode is formed on the second insulating film in the high-voltage driven thin film transistor formation region. The method also includes etching the first and second insulating films, thus forming first and second gate insulating films below, respectively, the first and second gate electrodes, with the second gate insulating film being wider than the second gate electrode.

Abstract: In a case of a liquid crystal display apparatus, a gate insulating film of a TFT driven at a low voltage (3.3 V or 5 V) is constituted by one insulating film, and a thickness thereof is set to, for example, 30 nm. This TFT has a structure in which LDD regions (low concentration impurity regions) are not provided. A TFT having a CMOS structure, which is driven at a high voltage (18 V), has a gate insulating film constituted by two insulating films having a thickness of, for example, 130 nm in total. In an n-type TFT, a low concentration impurity region is provided on a drain side. A p-type TFT has a structure having no LDD region. A pixel TFT has a gate insulating film constituted by two insulating films, and LDD regions provided in both of its source/drain.

Abstract: In a case of a liquid crystal display apparatus, a gate insulating film of a TFT driven at a low voltage (3.3 V or 5 V) is constituted by one insulating film, and a thickness thereof is set to, for example, 30 nm. This TFT has a structure in which LDD regions (low concentration impurity regions) are not provided. A TFT having a CMOS structure, which is driven at a high voltage (18 V), has a gate insulating film constituted by two insulating films having a thickness of, for example, 130 nm in total. In an n-type TFT, a low concentration impurity region is provided on a drain side. A p-type TFT has a structure having no LDD region. A pixel TFT has a gate insulating film constituted by two insulating films, and LDD regions provided in both of its source/drain.

Abstract: The present invention relates to an active matrix type display providing a thin film transistor (TFT) as a switching device and which can obtain a large storage capacitor without thinning an insulating film between electrodes or expanding an electrode to a pixel area. The active matrix type display is structured to have a plurality of gate wirings formed on a glass substrate, a plurality of data wirings formed on the glass substrate substantially orthogonal to the gate wirings, the TFT decided by the gate wirings and data wirings and formed in a plurality of pixel areas arranged in a matrix shape, a pixel electrode formed inside the pixel area and connected to the TFT, and a plurality of storage capacitor electrodes layers formed a plurality of storage capacitors between the glass substrate and pixel electrode via a plurality of insulating films.

Abstract: In a case of a liquid crystal display apparatus, a gate insulating film of a TFT driven at a low voltage (3.3 V or 5 V) is constituted by one insulating film, and a thickness thereof is set to, for example, 30 nm. This TFT has a structure in which LDD regions (low concentration impurity regions) are not provided. A TFT having a CMOS structure, which is driven at a high voltage (18 V), has a gate insulating film constituted by two insulating films having a thickness of, for example, 130 nm in total. In an n-type TFT, a low concentration impurity region is provided on a drain side. A p-type TFT has a structure having no LDD region. A pixel TFT has a gate insulating film constituted by two insulating films, and LDD regions provided in both of its source/drain.

Abstract: When a thin-film transistor (TFT) is formed on a glass substrate, electric charges caused in the TFT can be removed so as to avoid electrostatic damage in the TFT. A short-circuiting pattern that short-circuits the source region and the drain region of the TFT is added to a polysilicon pattern that constitutes the TFT. This short-circuiting pattern is removed at the same time as or after the wiring formation in the source region and the drain region.

Abstract: The present invention relates to an active matrix type display providing a thin film transistor (TFT) as a switching device and the object is to provide an active matrix type display which can obtain large storage capacitor without thinning an insulating film between electrodes nor expanding an electrode to a pixel area. The active matrix type display is structured to have a plurality of gate wirings 4 formed on a glass substrate 1, a plurality of data wirings 6 formed on the glass substrate 1 substantially orthogonally to the gate wirings 4, the TFT decided by the gate wirings 4 and data wirings 6 and formed in a plurality of pixel areas arranged in a matrix shape, a pixel electrode 7 formed inside the pixel area and connected to the TFT, and a plurality of storage capacitor electrodes layers (2d, 62) forming a plurality of storage capacitors Cs1 and Cs2 between the glass substrate 1 and pixel electrode 7 via a plurality of insulating films (51,52).

Abstract: In a case of a liquid crystal display apparatus, a gate insulating film of a TFT driven at a low voltage (3.3 V or 5 V) is constituted by one insulating film, and a thickness thereof is set to, for example, 30 nm. This TFT has a structure in which LDD regions (low concentration impurity regions) are not provided. A TFT having a CMOS structure, which is driven at a high voltage (18 V), has a gate insulating film constituted by two insulating films having a thickness of, for example, 130 nm in total. In an n-type TFT, a low concentration impurity region is provided on a drain side. A p-type TFT has a structure having no LDD region. A pixel TFT has a gate insulating film constituted by two insulating films, and LDD regions provided in both of its source/drain.

Abstract: When a thin-film transistor (TFT) is formed on a glass substrate, electric charges caused in the TFT can be removed so as to avoid electrostatic damage in the TFT. A short-circuiting pattern that short-circuits the source region and the drain region of the TFT is added to a polysilicon pattern that constitutes the TFT. This short-circuiting pattern is removed at the same time as or after the wiring formation in the source region and the drain region.

Abstract: When a thin-film transistor (TFT) is formed on a glass substrate, electric charges caused in the TFT can be removed so as to avoid electrostatic damage in the TFT. A short-circuiting pattern that short-circuits the source region and the drain region of the TFT is added to a polysilicon pattern that constitutes the TFT. This short-circuiting pattern is removed at the same time as or after the wiring formation in the source region and the drain region.

Abstract: A crystal silicon film deposited on an insulating film made of a binary system material or a binary system semiconductor film formed by an atomic layer deposition method has a grain as large as approximately 200 nm. Thus, the mobility of carriers is increased. The crystal silicon thereof is grown within a temperature range of 250.degree. C. to 400.degree. C. Accordingly, when a planar type thin film transistor, an inverted stagger type thin film transistor or a stagger type thin film transistor is formed using crystal silicon formed on these films made of a binary system material, transistor characteristics thereof are improved.