Patents by Inventor Yoshio Oida

Yoshio Oida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4606059
    Abstract: A variable frequency divider which includes a feedback shift register having a feedback gate of NOR type, a delay shift register for delaying output data from the feedback shift register by one clock, a control shift register having a control gate of AND type, a feedback circuit for feeding output data from the delay shift register and from the control shift register back to the feedback gate, and an expander which receives output data from the feedback shift register and produces a control signal according to said frequency dividing input and a frequency division ratio instruction signal. The control gate receives output data from the delay shift register and the control signal.
    Type: Grant
    Filed: March 23, 1984
    Date of Patent: August 12, 1986
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Yoshio Oida
  • Patent number: 4560888
    Abstract: An input logic circuit has a plurality of pairs of bipolar transistors. The bases of each pair of transistors receive a logic signal and its inverted signal, respectively, and the emitters thereof are coupled to each other. A signal transfer circuit has a pair of bipolar transistors the emitters of which are coupled to each other and the bases of which respectively receive an output signal and its inverted output signal from the input logic circuit. The signal transfer circuit is operated in response to a synchronizing signal. A signal hold circuit has a pair of bipolar transistors arranged such that their emitters are connected to each other, their bases and collectors are cross-coupled, and their bases respectively receive an output signal and its inverted output signal from the signal transfer circuit. The signal hold circuit is operated in response to the synchronizing signal. The signal transfer circuit and the signal hold circuit constitute an ECL synchronous latch.
    Type: Grant
    Filed: July 29, 1983
    Date of Patent: December 24, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Yoshio Oida
  • Patent number: 4529891
    Abstract: A comparator circuit comprising an operational amplifier for comparing a reference input signal at a given voltage and an input signal at an unknown voltage to produce a signal representing the result of the comparison, a first constant current source for feeding a constant current to the operational amplifier, an output transistor, having its base connected to the output of the operational amplifier, for controlling the output of the circuit, and a second constant current source for feeding a constant current to the base of the output transistor. This configuration enables the comparator circuit to operate normally, even when the input voltage is less than the reference voltage and is equal to zero.
    Type: Grant
    Filed: April 12, 1982
    Date of Patent: July 16, 1985
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventor: Yoshio Oida
  • Patent number: 4405904
    Abstract: A zero-crossing signal is generated in response to the zero-crossing of the current of an AC power source of a magnetron oscillator, and in response to the zero-crossing signal a triac connected between the magnetron oscillator and the AC power source is turned on to generate a microwave. The triac is turned off when the voltage of the AC power source becomes lower than a holding voltage of the triac.
    Type: Grant
    Filed: May 25, 1982
    Date of Patent: September 20, 1983
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Yoshio Oida, Masayuki Sasaki, Hidetoshi Semi
  • Patent number: 4370731
    Abstract: A system for entering a temperature setting into a memory store and for displaying it, wherein the temperature setting includes a temperature level portion and a temperature scale portion. The temperature level portion corresponds to the temperature at which a microwave oven, for example, is to be set and the temperature scale portion indicates whether the temperature level portion is calibrated in degrees Fahrenheit or degrees Celsius. The temperature level is inputted through a decimal keyboard and a key signal encoder. Gating circuits transfer the temperature level from the key signal encoder and the temperature scale from a temperature unit code generator to a memory under control of a preprogrammed instruction data generator. A display circuit and display unit are coupled to the memory for displaying the temperature setting.
    Type: Grant
    Filed: May 8, 1980
    Date of Patent: January 25, 1983
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Masayuki Sasaki, Yoshio Oida, Hidetoshi Semi
  • Patent number: 4295027
    Abstract: The microwave oven is provided with a main control circuit including an input mechanism of an information regarding a cooking time, a heat output level, foodstuff temperature, and the like, the main control circuit controlling the cooking operation in accordance with the predetermined operating condition represented by the input information and a magnetron energized by the output of the main control circuit.
    Type: Grant
    Filed: January 17, 1980
    Date of Patent: October 13, 1981
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Sadao Zushi, Yoshio Oida
  • Patent number: 4232210
    Abstract: An output power control system includes an output power control circuit for producing first and second control signals to control a switch and a semiconductor control element which are inserted between a power source and an oscillating magnetron tube. The output power control circuit includes a main control section and an output control section. The main control section receives a door signal representing the open or closed state of an oven door and an initiating pulse for initiating the operation of the output power control circuit. The same section periodically detects the door signal to produce first and second set signals when the door is closed at the detection, and to produce first and second reset signals when the door is open. The output control section includes a first means and a second means.
    Type: Grant
    Filed: June 22, 1978
    Date of Patent: November 4, 1980
    Assignee: Tokyo Shibaura Electric Co., Ltd.
    Inventors: Yoshio Oida, Masayuki Sasaki, Hidetoshi Semi
  • Patent number: 4224685
    Abstract: Disclosed is a power level setting/display circuit for a microwave oven which comprises a logical gate circuit for feeding a maximum power level signal to a setting register by means of a function key for power level setting, a logical gate circuit for supplying the fed maximum power level signal to a display register, a logical gate circuit for storing a power level command signal in a temporary storage register, a logical gate circuit for clearing the contents of the display register simultaneously with such storage of the power level command signal, a logical gate circuit forming a series closed loop by means of the display register and temporary storage register, whereby the power level command signal stored in the temporary storage register will be shifted to the bottom digit of the display register, and a logical gate circuit for supplying the power level command signal stored in the display register to the setting register.
    Type: Grant
    Filed: July 28, 1978
    Date of Patent: September 23, 1980
    Assignee: Tokyo Shibaura Denki Kabushiki Kaisha
    Inventors: Masayuki Sasaki, Yoshio Oida, Hidetoshi Semi