Patents by Inventor Yoshishige Endo
Yoshishige Endo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6774654Abstract: A semiconductor inspecting apparatus having a plurality of electrical connection boards arranged in the inspecting apparatus and a plurality of probes respectively provided on a plurality of beams formed on a first board of said plurality of electrical connection boards, the probes being adapted to be individually brought into contact with a plurality of electrode pads of a semiconductor device for inspection, so as to inspect the semiconductor device while establishing electrical connection therebetween. A one-end supported beam is used as each of the beams, and each of the probes is formed at a portion shifted in a rectangular direction to a center line of a longitudinal direction of the one-end supported beam.Type: GrantFiled: December 12, 2002Date of Patent: August 10, 2004Assignee: Renesas Technology Corp.Inventors: Masatoshi Kanamaru, Yoshishige Endo, Takanorr Aono, Ryuji Kohno, Toshio Miyatake, Hideyuki Aoki, Naoto Ban
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Patent number: 6714030Abstract: A semiconductor inspection apparatus which is possible to inspect a plurality of semiconductor devices collectively at one time, which has conventionally been difficult because of precision or the like of probes.Type: GrantFiled: March 18, 2003Date of Patent: March 30, 2004Assignee: Hitachi, Ltd.Inventors: Ryuji Kohno, Hideo Miura, Yoshishige Endo, Masatoshi Kanamaru, Atsushi Hosogane, Hideyuki Aoki, Naoto Ban
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Patent number: 6660541Abstract: A method of manufacturing a semiconductor device includes forming process of forming a semiconductor element on a semiconductor wafer and testing process of testing electrical performance of the formed semiconductor element. The testing process includes process of electrically connecting a testing apparatus to an electrode pad formed on the semiconductor element to be tested. The testing apparatus has a probe-formed substrate including a plurality of beams having probes to be electrically connected to the electrode pads. The probe-formed substrate has a first beam having at least one probe for electrically connection with the electrode pad and a second beam having a number of probes for electrical connection with the electrode pads of which number is more than the number of the electrode pads electrically connected by said first beam.Type: GrantFiled: October 23, 2002Date of Patent: December 9, 2003Assignee: Hitachi, Ltd.Inventors: Masatoshi Kanamaru, Yoshishige Endo, Takanori Aono, Ryuji Kohno, Hideyuki Aoki
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Publication number: 20030189439Abstract: A semiconductor inspection apparatus which is possible to inspect a plurality of semiconductor devices collectively at one time, which has conventionally been difficult because of precision or the like of probes.Type: ApplicationFiled: March 18, 2003Publication date: October 9, 2003Inventors: Ryuji Kohno, Hideo Miura, Yoshishige Endo, Masatoshi Kanamaru, Atsushi Hosogane, Hideyuki Aoki, Naoto Ban
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Publication number: 20030164352Abstract: A scroll type compressor comprises a stationary scroll and a rotary scroll which is assembled with the stationary scroll so as to define a closed space, the outer surface of the rotary scroll 22 is formed thereon with a tin compound film containing a tin compound and having a thickness of 50 &mgr;m. Such a coating film is never peeled off from a member even after long time operation, and is excellent in sealability and conformability, in the displacement type compressor.Type: ApplicationFiled: February 26, 2003Publication date: September 4, 2003Inventors: Yoshishige Endo, Eiichi Satoh, Akihiko Yamamoto, Yuji Yoshitomi, Koichi Inaba, Koichi Sekiguchi
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Publication number: 20030122550Abstract: A semiconductor device testing apparatus is realized, which allows contactors to be positioned throughout the wafer surface highly accurately for uniform contact, testing a large-sized wafer, and cost reduction. A plurality of divided contactor blocks is formed with a positioning groove. The groove is used to position the plurality of contactor blocks with a positioning frame. Because the contactor blocks are divided into plurals, it is less likely that a partial surface distortion affects other portions to impair surface flatness as compared with the case where a plurality of non-divided contactors is formed integrally, and the plurality of contactor blocks can be brought into contact with a wafer to be tested uniformly. Additionally, even though abnormality is generated in a part of the contactor blocks, only the part of the contactor blocks is replaced. Therefore, replacement costs can be reduced as compared with the case where a plurality of non-divided contactors is formed integrally.Type: ApplicationFiled: July 30, 2002Publication date: July 3, 2003Inventors: Masatoshi Kanamaru, Yoshishige Endo, Takanori Aono, Ryuji Kohno, Hiroya Shimizu, Naoto Ban, Hideyuki Aoki
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Publication number: 20030113944Abstract: A method of manufacturing a semiconductor device includes forming process of forming a semiconductor element on a semiconductor wafer and testing process of testing electrical performance of the formed semiconductor element. The testing process includes process of electrically connecting a testing apparatus to an electrode pad formed on the semiconductor element to be tested. The testing apparatus has a probe-formed substrate including a plurality of beams having probes to be electrically connected to the electrode pads. The probe-formed substrate has a first beam having at least one probe for electrically connection with the electrode pad and a second beam having a number of probes for electrical connection with the electrode pads of which number is more than the number of the electrode pads electrically connected by said first beam.Type: ApplicationFiled: October 23, 2002Publication date: June 19, 2003Applicant: Hitachi, Ltd.Inventors: Masatoshi Kanamaru, Yoshishige Endo, Takanori Aono, Ryuji Kohno, Hideyuki Aoki
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Publication number: 20030102880Abstract: A semiconductor inspecting apparatus having a plurality of electrical connection boards arranged in the inspecting apparatus and a plurality of probes respectively provided on a plurality of beams formed on a first board of said plurality of electrical connection boards, the probes being adapted to be individually brought into contact with a plurality of electrode pads of a semiconductor device for inspection, so as to inspect the semiconductor device while establishing electrical connection therebetween. A one-end supported beam is used as each of the beams, and each of the probes is formed at a portion shifted in a rectangular direction to a center line of a longitudinal direction of the one-end supported beam.Type: ApplicationFiled: December 12, 2002Publication date: June 5, 2003Inventors: Masatoshi Kanamaru, Yoshishige Endo, Takanorr Aono, Ryuji Kohno, Toshio Miyatake, Hideyuki Aoki, Naoto Ban
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Patent number: 6573112Abstract: Semiconductor device chips manufacturing and inspecting method is disclosed in which a semiconductor wafer is cut into individual LSI chips. The LSI chips are rearranged and integrated into a predetermined number. The cut LSI chips are integrated in a jig having openings with a size commensurate with the dimensions of the LSI chip. At least one part of the jig having such openings has a coefficient of thermal expansion that is approximately equal to that of the LSI chips. The integrated predetermined number of chips are subjected to an inspection process in a subsequent inspection step thereby improving efficiency and reducing cost.Type: GrantFiled: September 11, 2002Date of Patent: June 3, 2003Assignee: Hitachi, Ltd.Inventors: Ryuji Kono, Akihiko Ariga, Hideyuki Aoki, Hiroyuki Ohta, Yoshishige Endo, Masatoshi Kanamaru, Atsushi Hosogane, Shinji Tanaka, Naoto Ban, Hideo Miura
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Publication number: 20030092206Abstract: In an electric characteristic testing process corresponding to a process of the semiconductor apparatus manufacturing processes, in order to test a large area of the electrode pad of the body to be tested in a lump, an electric characteristic testing is performed by pressing a testing structure provided with electrically independent projections having a number equal to a number of conductor portions to be tested formed on an area to be tested of a body to be tested to the body to be tested.Type: ApplicationFiled: December 23, 2002Publication date: May 15, 2003Inventors: Ryuji Kono, Makoto Kitano, Hideo Miura, Hiroyuki Ota, Yoshishige Endo, Takeshi Harada, Masatoshi Kanamaru, Teruhisa Akashi, Atsushi Hosogane, Akihiko Ariga, Naoto Ban
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Patent number: 6548315Abstract: A semiconductor inspection apparatus which is possible to inspect a plurality of semiconductor devices collectively at one time, which has conventionally been difficult because of precision or the like of probes.Type: GrantFiled: January 29, 2002Date of Patent: April 15, 2003Assignee: Hitachi, Ltd.Inventors: Ryuji Kohno, Hideo Miura, Yoshishige Endo, Masatoshi Kanamaru, Atsushi Hosogane, Hideyuki Aoki, Naoto Ban
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Patent number: 6531327Abstract: A method for manufacturing a semiconductor device includes forming an integrated circuit on a surface of a wafer and testing electric characteristic of the integrated circuit. The testing includes positioning each of probes of a semiconductor testing equipment and each of electrodes of a tested semiconductor element with each other, and allowing each of the probes to come into contact with each of the electrodes. The semiconductor testing equipment includes a first substrate having a cantilever, the probes being formed on the cantilever of the first substrate, and wires for electrically connecting the probes to electrode pads which are formed on an opposite side of the first substrate to a side on which the probes are formed. Each of the wires has a region arranged on an insulating layer, which is formed on the cantilever, on the opposite side.Type: GrantFiled: February 13, 2002Date of Patent: March 11, 2003Assignee: Hitachi, Ltd.Inventors: Masatoshi Kanamaru, Yoshishige Endo, Atsushi Hosogane, Tatsuya Nagata, Ryuji Kohno, Hideyuki Aoki, Akihiko Ariga
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Publication number: 20030027365Abstract: [Problem] To provide a semiconductor device manufacturing method and a semiconductor device inspection method both of which are capable of efficiently inspecting individual LSI chips separated by cutting, as well as a jig for use in such methods.Type: ApplicationFiled: September 11, 2002Publication date: February 6, 2003Applicant: Hitachi, Ltd.Inventors: Ryuji Kono, Akihiko Ariga, Hideyuki Aoki, Hiroyuki Ohta, Yoshishige Endo, Masatoshi Kanamaru, Atsushi Hosogane, Shinji Tanaka, Naoto Ban, Hideo Miura
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Patent number: 6511857Abstract: In an electric characteristic testing process corresponding to a process of the semiconductor apparatus manufacturing processes, in order to test a large area of the electrode pad of the body to be tested in a lump, an electric characteristic testing is performed by pressing a testing structure provided with electrically independent projections having a number equal to a number of conductor portions to be tested formed on an area to be tested of a body to be tested to the body to be tested.Type: GrantFiled: January 12, 2001Date of Patent: January 28, 2003Assignee: Hitachi, Ltd.Inventors: Ryuji Kono, Makoto Kitano, Hideo Miura, Hiroyuki Ota, Yoshishige Endo, Takeshi Harada, Masatoshi Kanamaru, Teruhisa Akashi, Atsushi Hosogane, Akihiko Ariga, Naoto Ban
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Publication number: 20030015779Abstract: A packaging device for holding thereon a plurality of semiconductor devices to be inspected on an inspection device including a probe to be electrically connected to an electrode of each of the semiconductor devices, comprises, holes for respectively receiving detachably therein the semiconductor devices to keep a positional relationship among the semiconductor devices and a positional relationship between the packaging device and each of the semiconductor devices constant with a spacing between the semiconductor devices, in a direction perpendicular to a thickness direction of the semiconductor devices, and electrically conductive members adapted to be connected respectively to the electrodes of the semiconductor devices, and extending to an exterior of the packaging device so that the probe is connected to each of the electrically conductive members.Type: ApplicationFiled: September 24, 2002Publication date: January 23, 2003Inventors: Ryuji Kohno, Hiroya Shimizu, Masatoshi Kanamaru, Atsushi Hosogane, Toshio Miyatake, Hideo Miura, Tatsuya Nagata, Yoshishige Endo, Masaaki Namba, Yuji Wada
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Patent number: 6507204Abstract: The conventional semiconductor element testing equipment is arranged to position each probe accurately and need a burdensome operation for fixing, and includes only a limited number of electrode pads and chips to be tested at a batch. An equipment for testing a semiconductor element is arranged to keep each of electrode pads formed on a semiconductor element to be tested in direct contact with each of probes formed on a first substrate composed of silicon, one of electric connecting substrates disposed in the equipment. On the first substrate, each probe is formed on a cantilever and a wire is routed from a tip of each probe along a tip of the cantilever to the electrode pad formed on an opposite surface to the probe forming surface through an insulating layer.Type: GrantFiled: March 9, 2000Date of Patent: January 14, 2003Assignee: Hitachi, Ltd.Inventors: Masatoshi Kanamaru, Yoshishige Endo, Atsushi Hosogane, Tatsuya Nagata, Ryuji Kohno, Hideyuki Aoki, Akihiko Ariga
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Patent number: 6496023Abstract: A structure is provided such that a plural cantilevers are formed on a first board formed of silicon, probes are respectively formed on the individual cantilevers at positions each offset perpendicularly to a longitudinal center line of the cantilever, and wiring connected continuously from each probe to a secondary electrode pad portion through an insulating layer. A structure is alternatively adopted such that by using a both-ends supported beam formed of silicon as the beam, each probe is formed at a position offset toward a supported portion side of the both-ends supported beam.Type: GrantFiled: November 28, 2000Date of Patent: December 17, 2002Assignee: Hitachi, Ltd.Inventors: Masatoshi Kanamaru, Yoshishige Endo, Takanorr Aono, Ryuji Kohno, Toshio Miyatake, Hideyuki Aoki, Naoto Ban
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Patent number: 6479305Abstract: Semiconductor device chips manufacturing and inspecting method is disclosed in which a semiconductor wafer is cut into individual LSI chips. The LSI chips are rearranged and integrated into a predetermined number. The cut LSI chips are integrated in a jig having openings with a size commensurate with the dimensions of the LSI chip. At least one part of the jig having such openings has a coefficient of thermal expansion that is approximately equal to that of the LSI chips. The integrated predetermined number of chips are subjected to an inspection process in a subsequent inspection step thereby improving efficiency and reducing cost.Type: GrantFiled: September 15, 1999Date of Patent: November 12, 2002Assignee: Hitachi, Ltd.Inventors: Ryuji Kono, Akihiko Ariga, Hideyuki Aoki, Hiroyuki Ohta, Yoshishige Endo, Masatoshi Kanamaru, Atsushi Hosogane, Shinji Tanaka, Naoto Ban, Hideo Miura
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Patent number: 6477133Abstract: A disk drive is realized, which omits running-in for stabilizing a change in a correcting function produced by sliding between balls and a rolling groove in an unbalance correcting mechanism, and prevents immobility and straying of balls, and which comprises a unit mechanism assembled by using 12 balls subjected to surface treatment with heptadecafluorodecyltrimethoxysilane and a turntable plated with a chemical nickel plating containing phosphorus and boron to have a thickness of 5 &mgr;m and by injecting 1 microliter of ester oil into the rolling groove, and further comprises a recess formed in a sidewall of the rolling groove of the unbalance correcting mechanism to prolong the service life of the correcting function.Type: GrantFiled: August 24, 2000Date of Patent: November 5, 2002Assignee: Hitachi, Ltd.Inventors: Yasuhiro Yoshimura, Yoshishige Endo, Katsutoshi Nii, Yoshihiro Satou, Yoshiaki Yamauchi, Noriyuki Kumasaka, Kazuto Oyama, Hisahiro Miki, Tomoki Hirata
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Patent number: 6465264Abstract: A packaging device for holding thereon a plurality of semiconductor devices to be inspected on an inspection device including a probe to be electrically connected to an electrode of each of the semiconductor devices, comprises, holes for respectively receiving detachably therein the semiconductor devices to keep a positional relationship among the semiconductor devices and a positional relationship between the packaging device and each of the semiconductor devices constant with a spacing between the semiconductor devices, in a direction perpendicular to a thickness direction of the semiconductor devices, and electrically conductive members adapted to be connected respectively to the electrodes of the semiconductor devices, and extending to an exterior of the packaging device so that the probe is connected to each of the electrically conductive members.Type: GrantFiled: September 1, 2000Date of Patent: October 15, 2002Assignee: Hitachi, Ltd.Inventors: Ryuji Kohno, Hiroya Shimizu, Masatoshi Kanamaru, Atsushi Hosogane, Toshio Miyatake, Hideo Miura, Tatsuya Nagata, Yoshishige Endo, Masaaki Namba, Yuji Wada