Patents by Inventor Yoshitaka Hokomoto

Yoshitaka Hokomoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030201464
    Abstract: A semiconductor device comprises a field effect transistor and a schottky-barrier diode mounted in the same semiconductor substrate, the semiconductor device having buried doped layers buried at a predetermined interval in a drift layer of a first conductivity type in a schottky-barrier diode region so as to have a predetermined depth, the buried doped layers having a second conductivity type.
    Type: Application
    Filed: March 4, 2003
    Publication date: October 30, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventor: Yoshitaka Hokomoto
  • Publication number: 20020190340
    Abstract: A semiconductor device comprises a first semiconductor layer of a first conductivity type provided on a semiconductor substrate of the first conductivity type, a base layer of a second conductivity type provided in the first semiconductor layer, for defining a vertical MISFET including source regions and a gate electrode on a gate insulation film, a Schottky barrier diode (SBD)-forming region provided in the first semiconductor layer around the base layer, a guard ring region of the second conductivity type provided around SBD-forming region, a first main electrode disposed above the first semiconductor layer and provided in common as both a source electrode of the MISFET and an anode of the SBD, a surface gate electrode disposed above the first semiconductor layer, and a second main electrode provided in common as a drain electrode of the MISFET and a cathode of the SBD.
    Type: Application
    Filed: June 10, 2002
    Publication date: December 19, 2002
    Inventors: Kouji Moriguchi, Yoshitaka Hokomoto