Abstract: A variable gain amplifier is disclosed, comprising a pair of differential MOS transistors M1 and M2 and a current mirror. The sources of the differential MOS transistors M1 and M2 are connected to a constant voltage terminal. Since a DC voltage Vc is added to input signals, output signals that are theoretically free of a distortion are obtained. The gain can be controlled from infinitesimal. Since the gain is directly proportional to the control voltage, it can be easily controlled. Since a single output current is free of a distortion, even if amplifiers are connected on many stages, an output signal that is free of a distortion can be obtained.

Abstract: A signal converting device receives input data obtained by continuously scanning data for a predetermined period along one of i axes X1, X2 . . . Xi of an imaginary i-dimensional spatial coordinate system, where the data exists in given space-time regions a1, a2 . . . ai extending along these axes. The device processes the data in a given sub time-space region Nj included in any time-space region aj (where j=1, 2 . . . i) at a magnification specific to a given sub time-space region Mj (1.ltoreq.j.ltoreq.i). As a result, the device outputs new data existing in the sub time-space region Mj. The region Mj is identical to the sub time-space region Nj, or exists outside the time-space region aj.

Abstract: A circuit for processing an intermediate frequency signal comprises a limiter connected to receive the intermediate frequency signal to generate a carrier component of the intermediate frequency signal as an output, a phase locked loop circuit connected to receive one of the intermediate frequency signal and the carrier component from the limiter to generate an output signal which is phase-locked onto the carrier component of the intermediate frequency signal, a synchronous detector for synchronously detecting the intermediate frequency signal depended on the output signal from the phase locked loop circuit, and an automatic frequency circuit connected to receive the carrier component from the limiter and the output signal from the phase locked loop circuit to generate an output signal, as an automatic frequency tuning signal, in response to a frequency difference therebetween.

Abstract: A circuit arrangement for processing color television signals incorporated in a multi-mode type color TV receiver which is capable of receiving TV signals processed by different television systems such as NTSC and PAL systems.

Abstract: Unbalanced two input signals are applied to a buffer. The buffer provides to an balanced adder with balanced buffer output signals. The adder adds the buffer output signals and generates an unbalanced addition output signal. The addition output signal is inputted to one of balanced inputs of a first subtractor the other input of which is supplied with a reference potential. The buffer output signals are supplied to balanced inputs of a second subtractor. The first subtractor generates a sum of unbalanced two input signals of the buffer, and the second subtractor generates a difference thereof.