Patents by Inventor Yoshitaka Yamamoto
Yoshitaka Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11927355Abstract: An air conditioning and ventilating system including: an air conditioning device including a heat exchanger configured to generate conditioned air by heat exchange with a refrigerant; a ventilation device communicatively connected to the air conditioning device and including a supply air fan and/or an exhaust fan; an airflow volume detection unit configured to detect an airflow volume equivalent value of the ventilation device; and a control unit. On determination that the airflow volume equivalent value acquired from the airflow volume detection unit is equal to or less than a first predetermined value, the control unit sets an operation of the air conditioning device to a stop state.Type: GrantFiled: March 22, 2022Date of Patent: March 12, 2024Assignee: DAIKIN INDUSTRIES, LTD.Inventors: Kousuke Hirai, Akiyoshi Yamamoto, Gakuto Sakai, Tooru Fujimoto, Yoshitaka Matsugi
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Publication number: 20230166629Abstract: A substitution system includes a vehicle including a battery and a charging port electrically coupled to the battery, a connector configured to be detachably attached to the port and to supply power from outside to the vehicle or from the vehicle to outside, and a control device including a processor and a memory. The processor is configured to determine whether the vehicle is at a delivery destination, and when determining that the vehicle is at the delivery destination, acquire the state of charge (SOC) of the vehicle battery and information indicating whether the connector is coupled to the port, and based on the SOC and the information, determine whether to set attachment substitution in which a delivery person who visits the delivery destination to deliver an item attaches the connector to the port or detachment substitution in which the delivery person detaches the connector from the port.Type: ApplicationFiled: November 16, 2022Publication date: June 1, 2023Inventor: Yoshitaka YAMAMOTO
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Patent number: 11404585Abstract: A manufacturing method of a semiconductor device in which the threshold is adjusted to an appropriate value is provided. The semiconductor device includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is sandwiched, an electron trap layer between the first gate electrode and the semiconductor, and a gate insulating layer between the second gate electrode and the semiconductor. By keeping a potential of the first gate electrode higher than a potential of the source or drain electrode for 1 second or more while heating, electrons are trapped in the electron trap layer. Consequently, threshold is increased and Icut is reduced.Type: GrantFiled: April 5, 2018Date of Patent: August 2, 2022Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Yamamoto, Tetsuhiro Tanaka, Toshihiko Takeuchi, Yasumasa Yamane, Takayuki Inoue, Shunpei Yamazaki
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Publication number: 20210331096Abstract: In order to enable stable provision of an upward release tube-type ceramic filter used in a molten metal bath and having a side wall with a height of 300 mm or greater, this method for manufacturing a ceramic filter, which is an upward release tube-type integrally molded article for removing unwanted substances from molten metal, has: a step for kneading a mixture of an aggregate comprising ceramic particles, a prescribed binding agent, and water to prepare a base material; a step for integrally forming an upward release tube-type ceramic filter precursor from the prepared base material; step for drying the precursor; a step for providing a retainer for the dried precursor for supporting a side wall of the precursor; a step for subsequently sintering the precursor; and a step for removing the retainer after sintering.Type: ApplicationFiled: July 9, 2018Publication date: October 28, 2021Inventors: Moriaki MIYAHARA, Yoshitaka YAMAMOTO
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Patent number: 10944014Abstract: To provide a transistor having a high on-state current. A semiconductor device includes a first insulator containing excess oxygen, a first oxide semiconductor over the first insulator, a second oxide semiconductor over the first oxide semiconductor, a first conductor and a second conductor which are over the second oxide semiconductor and are separated from each other, a third oxide semiconductor in contact with side surfaces of the first oxide semiconductor, a top surface and side surfaces of the second oxide semiconductor, a top surface of the first conductor, and a top surface of the second conductor, a second insulator over the third oxide semiconductor, and a third conductor facing a top surface and side surfaces of the second oxide semiconductor with the second insulator and the third oxide semiconductor therebetween. The first oxide semiconductor has a higher oxygen-transmitting property than the third oxide semiconductor.Type: GrantFiled: July 17, 2019Date of Patent: March 9, 2021Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yuhei Sato, Yasumasa Yamane, Yoshitaka Yamamoto, Hideomi Suzawa, Tetsuhiro Tanaka, Yutaka Okazaki, Naoki Okuno, Takahisa Ishiyama
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Publication number: 20190341495Abstract: To provide a transistor having a high on-state current. A semiconductor device includes a first insulator containing excess oxygen, a first oxide semiconductor over the first insulator, a second oxide semiconductor over the first oxide semiconductor, a first conductor and a second conductor which are over the second oxide semiconductor and are separated from each other, a third oxide semiconductor in contact with side surfaces of the first oxide semiconductor, a top surface and side surfaces of the second oxide semiconductor, a top surface of the first conductor, and a top surface of the second conductor, a second insulator over the third oxide semiconductor, and a third conductor facing a top surface and side surfaces of the second oxide semiconductor with the second insulator and the third oxide semiconductor therebetween. The first oxide semiconductor has a higher oxygen-transmitting property than the third oxide semiconductor.Type: ApplicationFiled: July 17, 2019Publication date: November 7, 2019Inventors: Shunpei YAMAZAKI, Akihisa SHIMOMURA, Yuhei SATO, Yasumasa YAMANE, Yoshitaka YAMAMOTO, Hideomi SUZAWA, Tetsuhiro TANAKA, Yutaka OKAZAKI, Naoki OKUNO, Takahisa ISHIYAMA
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Patent number: 10374097Abstract: To provide a transistor having a high on-state current. A semiconductor device includes a first insulator containing excess oxygen, a first oxide semiconductor over the first insulator, a second oxide semiconductor over the first oxide semiconductor, a first conductor and a second conductor which are over the second oxide semiconductor and are separated from each other, a third oxide semiconductor in contact with side surfaces of the first oxide semiconductor, a top surface and side surfaces of the second oxide semiconductor, a top surface of the first conductor, and a top surface of the second conductor, a second insulator over the third oxide semiconductor, and a third conductor facing a top surface and side surfaces of the second oxide semiconductor with the second insulator and the third oxide semiconductor therebetween. The first oxide semiconductor has a higher oxygen-transmitting property than the third oxide semiconductor.Type: GrantFiled: January 9, 2018Date of Patent: August 6, 2019Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yuhei Sato, Yasumasa Yamane, Yoshitaka Yamamoto, Hideomi Suzawa, Tetsuhiro Tanaka, Yutaka Okazaki, Naoki Okuno, Takahisa Ishiyama
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Publication number: 20180233597Abstract: A manufacturing method of a semiconductor device in which the threshold is adjusted to an appropriate value is provided. The semiconductor device includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is sandwiched, an electron trap layer between the first gate electrode and the semiconductor, and a gate insulating layer between the second gate electrode and the semiconductor. By keeping a potential of the first gate electrode higher than a potential of the source or drain electrode for 1 second or more while heating, electrons are trapped in the electron trap layer. Consequently, threshold is increased and Icut is reduced.Type: ApplicationFiled: April 5, 2018Publication date: August 16, 2018Inventors: Yoshitaka YAMAMOTO, Tetsuhiro TANAKA, Toshihiko TAKEUCHI, Yasumasa YAMANE, Takayuki INOUE, Shunpei YAMAZAKI
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Publication number: 20180151743Abstract: To provide a transistor having a high on-state current. A semiconductor device includes a first insulator containing excess oxygen, a first oxide semiconductor over the first insulator, a second oxide semiconductor over the first oxide semiconductor, a first conductor and a second conductor which are over the second oxide semiconductor and are separated from each other, a third oxide semiconductor in contact with side surfaces of the first oxide semiconductor, a top surface and side surfaces of the second oxide semiconductor, a top surface of the first conductor, and a top surface of the second conductor, a second insulator over the third oxide semiconductor, and a third conductor facing a top surface and side surfaces of the second oxide semiconductor with the second insulator and the third oxide semiconductor therebetween. The first oxide semiconductor has a higher oxygen-transmitting property than the third oxide semiconductor.Type: ApplicationFiled: January 9, 2018Publication date: May 31, 2018Inventors: Shunpei YAMAZAKI, Akihisa SHIMOMURA, Yuhei SATO, Yasumasa YAMANE, Yoshitaka YAMAMOTO, Hideomi SUZAWA, Tetsuhiro TANAKA, Yutaka OKAZAKI, Naoki OKUNO, Takahisa ISHIYAMA
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Patent number: 9960416Abstract: The present invention provides a positive electrode for a non-aqueous electrolyte secondary battery in which the charge/discharge rate of a secondary battery is increased by increasing the discharge/discharge rate of the positive electrode as a result of increasing the rate of incorporation and release of lithium ions in olivine-type phosphorous complex compound particles, a non-aqueous electrolyte secondary battery provided with this positive electrode for a non-aqueous electrolyte secondary battery, and a battery module provided with this non-aqueous electrolyte secondary battery.Type: GrantFiled: December 14, 2011Date of Patent: May 1, 2018Assignee: SUMITOMO OSAKA CEMENT CO., LTD.Inventors: Tomitaro Hara, Takao Fukunaga, Takayasu Iguchi, Takao Kitagawa, Yoshitaka Yamamoto
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Patent number: 9947800Abstract: A transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device is provided. In a top-gate transistor in which an oxide semiconductor is used for a semiconductor layer where a channel is formed, elements are introduced to the semiconductor layer in a self-aligned manner after a gate electrode is formed. After that, a side surface of the gate electrode is covered with a structure body. The structure body preferably contains silicon oxide. A first insulating layer is formed to cover the semiconductor layer, the gate electrode, and the structure body. A second insulating layer is formed by a sputtering method over the first insulating layer. Oxygen is introduced to the first insulating layer when the second insulating layer is formed.Type: GrantFiled: June 1, 2017Date of Patent: April 17, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yoshitaka Yamamoto
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Patent number: 9939127Abstract: A lighting device (100) includes: a surface light source (1); a first lens (L1) having a first focal point (F1), the first lens being provided on the light exit surface side of the surface light source; and a second lens (L2) having a second focal point (F2), the second lens being provided on a light exit surface side of the first lens, the surface light source, the first lens, and the second lens being configured such that a first virtual image (I1) is formed by the first lens and a second virtual image (I2) is formed by the second lens, wherein the first virtual image (I1) is formed between the second focal point (F2) and the first lens, and the second focal point (F2) is on a side opposite to the light source side relative to a predetermined focal position f?.Type: GrantFiled: July 26, 2013Date of Patent: April 10, 2018Assignees: Sharp Kabushiki Kaisha, TOHOKU UNIVERSITYInventors: Tatsuo Uchida, Yoshito Suzuki, Tohru Kawakami, Takahiro Ishinabe, Katsunori Ehara, Yoshihiro Hashimoto, Toshiki Matsuoka, Kozo Nakamura, Yasuhisa Itoh, Yoshitaka Yamamoto, Yutaka Ishii, David Montgomery
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Patent number: 9893194Abstract: A method for adjusting threshold of a semiconductor device is provided. In a plurality of semiconductor devices each including a semiconductor, a source or drain electrode electrically in contact with the semiconductor, a gate electrode, and a charge trap layer between a gate electrode and the semiconductor, a state where the potential of the gate electrode is set higher than the potential of the source or drain electrode while the semiconductor devices are heated at 150° C. or higher and 300° C. or lower is kept for one second or longer to trap electrons in the charge trap layer, so that the threshold is increased and Icut is reduced. Here, the potential difference between the gate electrode and the source or drain electrode is set so that it is different between the semiconductor devices, and the thresholds of the semiconductor devices are adjusted to be appropriate to each purpose.Type: GrantFiled: September 4, 2014Date of Patent: February 13, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Yamamoto, Tetsuhiro Tanaka, Takayuki Inoue, Hideomi Suzawa
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Patent number: 9882059Abstract: To provide a transistor having a high on-state current. A semiconductor device includes a first insulator containing excess oxygen, a first oxide semiconductor over the first insulator, a second oxide semiconductor over the first oxide semiconductor, a first conductor and a second conductor which are over the second oxide semiconductor and are separated from each other, a third oxide semiconductor in contact with side surfaces of the first oxide semiconductor, a top surface and side surfaces of the second oxide semiconductor, a top surface of the first conductor, and a top surface of the second conductor, a second insulator over the third oxide semiconductor, and a third conductor facing a top surface and side surfaces of the second oxide semiconductor with the second insulator and the third oxide semiconductor therebetween. The first oxide semiconductor has a higher oxygen-transmitting property than the third oxide semiconductor.Type: GrantFiled: December 16, 2014Date of Patent: January 30, 2018Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Akihisa Shimomura, Yuhei Sato, Yasumasa Yamane, Yoshitaka Yamamoto, Hideomi Suzawa, Tetsuhiro Tanaka, Yutaka Okazaki, Naoki Okuno, Takahisa Ishiyama
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Patent number: 9812466Abstract: A highly reliable semiconductor device that is suitable for high-speed operation is provided. A semiconductor device includes a first circuit, a second circuit, and a third circuit. The first circuit has an arithmetic processing function. The second circuit includes a memory circuit. The memory circuit includes a transistor which includes a first conductor, a second conductor, a first insulator, a second insulator, and a semiconductor. The first conductor includes a region overlapping the semiconductor with the first insulator positioned between the first conductor and the semiconductor. The second conductor includes a region overlapping the semiconductor with the second insulator positioned between the second conductor and the semiconductor. The first conductor is capable of selecting on or off of the transistor. The third circuit is electrically connected to the second conductor, and is capable of changing the potential of the second conductor in synchronization with an operation of the transistor.Type: GrantFiled: August 4, 2015Date of Patent: November 7, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tomoaki Atsumi, Masayuki Sakakura, Yoshitaka Yamamoto, Jun Koyama, Tetsuhiro Tanaka, Kazuki Tanemura
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Publication number: 20170271521Abstract: A transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device is provided. In a top-gate transistor in which an oxide semiconductor is used for a semiconductor layer where a channel is formed, elements are introduced to the semiconductor layer in a self-aligned manner after a gate electrode is formed. After that, a side surface of the gate electrode is covered with a structure body. The structure body preferably contains silicon oxide. A first insulating layer is formed to cover the semiconductor layer, the gate electrode, and the structure body. A second insulating layer is formed by a sputtering method over the first insulating layer. Oxygen is introduced to the first insulating layer when the second insulating layer is formed.Type: ApplicationFiled: June 1, 2017Publication date: September 21, 2017Inventors: Shunpei YAMAZAKI, Yoshitaka YAMAMOTO
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Patent number: 9748563Abstract: An electrode material of the present invention includes surface-coated LixAyDzPO4 particles obtained by coating surfaces of LixAyDzPO4 (in which, A represents one or more selected from the group consisting of Co, Mn, Ni, Fe, Cu and Cr, D represents one or more selected from the group consisting of Mg, Ca, Sr, Ba, Ti, Zn, B, Al, Ga, In, Si, Ge, Sc, Y and rare earth elements, 0<x?2, 0<y?1, and 0?z?1.5) particles with a carbonaceous coat, and an elution amount of Li is in a range of 200 ppm to 700 ppm and an elution amount of P is in a range of 500 ppm to 2000 ppm when the surface-coated LixAyDzPO4 particles are immersed in a sulfuric acid solution having a hydrogen-ion exponent of 4 for 24 hours.Type: GrantFiled: January 22, 2013Date of Patent: August 29, 2017Assignee: SUMITOMO OSAKA CEMENT CO., LTD.Inventors: Akinori Yamazaki, Yoshitaka Yamamoto, Takao Kitagawa, Hirofumi Yasumiishi
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Patent number: 9685560Abstract: A transistor with favorable electrical characteristics, a transistor with stable electrical characteristics, or a highly integrated semiconductor device is provided. In a top-gate transistor in which an oxide semiconductor is used for a semiconductor layer where a channel is formed, elements are introduced to the semiconductor layer in a self-aligned manner after a gate electrode is formed. After that, a side surface of the gate electrode is covered with a structure body. The structure body preferably contains silicon oxide. A first insulating layer is formed to cover the semiconductor layer, the gate electrode, and the structure body. A second insulating layer is formed by a sputtering method over the first insulating layer. Oxygen is introduced to the first insulating layer when the second insulating layer is formed.Type: GrantFiled: March 1, 2016Date of Patent: June 20, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yoshitaka Yamamoto
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Patent number: 9672873Abstract: A novel semiconductor device where multilevel data can be written and read. The semiconductor device includes first to fifth transistors, a capacitor, a bit line, and a power supply line. Write operation is performed in such a manner that first data is supplied to a gate of the fifth transistor through the first transistor; the first transistor is turned off; second data is supplied to a second electrode of the capacitor through the second transistor to convert the first data into third data; and the second electrode of the capacitor are made electrically floating. The second electrode of the capacitor is initialized to GND through the third transistor. Read operation is performed by charging or discharging the bit line through the fourth transistor and the fifth transistor. The first to third transistors are preferably oxide semiconductor transistors.Type: GrantFiled: May 20, 2016Date of Patent: June 6, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Yamamoto, Kiyoshi Kato
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Patent number: 9543295Abstract: A semiconductor device that includes transistors with different threshold voltages is provided. Alternatively, a semiconductor device including a plurality of kinds of circuits and transistors whose electrical characteristics are different between the circuits is provided. The semiconductor device includes a first transistor and a second transistor. The first transistor includes an oxide semiconductor, a conductor, a first insulator, a second insulator, and a third insulator. The conductor has a region where the conductor and the oxide semiconductor overlap with each other. The first insulator is positioned between the conductor and the oxide semiconductor. The second insulator is positioned between the conductor and the first insulator. The third insulator is positioned between the conductor and the second insulator. The second insulator has a negatively charged region.Type: GrantFiled: September 1, 2015Date of Patent: January 10, 2017Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshitaka Yamamoto, Masayuki Sakakura, Tetsuhiro Tanaka, Daisuke Matsubayashi