Patents by Inventor Yoshiyuki Ishida

Yoshiyuki Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11970004
    Abstract: A liquid discharge head includes a liquid discharge substrate that has a discharge-orifice row, pressure generating elements, and pressure chambers. The liquid discharge head discharges a liquid in a block-by-block manner using sequential driving. The discharge-orifice row is disposed so as to incline at an angle ?=Arctan (d1/d2) relative to a direction extending orthogonal to the conveyance direction of the medium, in which d1 (?m) is a disposition spacing of the discharge orifices in the discharge-orifice row in the conveyance direction and d2 (?m) is a disposition spacing of the discharge orifices in the discharge-orifice row in the direction orthogonal to the conveyance direction. A partition wall is formed between adjacent pressure chambers so as to separate the adjacent pressure chambers from each other. The partition wall has a communicating portion that communicates the adjacent pressure chambers with each other.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: April 30, 2024
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tomohiro Sato, Shuzo Iwanaga, Takatsugu Moriya, Koichi Ishida, Shingo Okushima, Shintaro Kasai, Yoshiyuki Nakagawa, Akiko Hammura
  • Patent number: 10754019
    Abstract: The objective of the present invention is to use a simple circuit configuration and simple signal processing to provide a pulse radar device with which it is possible to reduce the impact of local signal carrier leakage on a received signal, and which makes it possible to perform high precision angle measurement using a multi-beam system. In order to measure the angle of an object, a pulse radar device is provided with at least two receiving antennas, and a reception circuit is provided with a signal selection switch for selectively switching between received signals received by the receiving antennas. The received signal contains a local signal leakage component, and a DC level of the received signal varies with the switching of the signal selection switch. In order to eliminate the impact of such DC level variations, a high-pass filter is disposed between a mixer and a frequency analyzer.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: August 25, 2020
    Assignees: FURUKAWA ELECTRIC CO., LTD., FURUKAWA AUTOMOTIVE SYSTEMS INC.
    Inventors: Yoshiyuki Ishida, Yasushi Aoyagi, Hiroyasu Yano
  • Publication number: 20180024234
    Abstract: The objective of the present invention is to use a simple circuit configuration and simple signal processing to provide a pulse radar device with which it is possible to reduce the impact of local signal carrier leakage on a received signal, and which makes it possible to perform high precision angle measurement using a multi-beam system. In order to measure the angle of an object, a pulse radar device is provided with at least two receiving antennas, and a reception circuit is provided with a signal selection switch for selectively switching between received signals received by the receiving antennas. The received signal contains a local signal leakage component, and a DC level of the received signal varies with the switching of the signal selection switch. In order to eliminate the impact of such DC level variations, a high-pass filter is disposed between a mixer and a frequency analyzer.
    Type: Application
    Filed: September 29, 2017
    Publication date: January 25, 2018
    Applicants: FURUKAWA ELECTRIC CO., LTD., FURUKAWA AUTOMOTIVE SYSTEMS INC.
    Inventors: Yoshiyuki ISHIDA, Yasushi AOYAGI, Hiroyasu YANO
  • Publication number: 20170007659
    Abstract: It is an object of the present invention to provide a method for preparing a water extract of ashwagandha, which comprises increasing the amounts of withanone and withaferin A contained as active ingredients in the water extract of ashwagandha leaves. In addition, it is another object of the present invention to more economically and simply provide a pharmaceutical composition comprising ashwagandha leaves. The present invention relates to a method for preparing a water extract of ashwagandha leaves, which comprises extracting ashwagandha leaves with water in the presence of cyclodextrin, and a method for enhancing the anticancer activity of the water extract of ashwagandha leaves. The present invention also relates to a pharmaceutical composition for treating or preventing cancer, comprising the water extract of ashwagandha leaves. The present invention further relates to a pharmaceutical composition comprising dry powders of ashwagandha leaves and cyclodextrin.
    Type: Application
    Filed: January 29, 2015
    Publication date: January 12, 2017
    Applicants: National Institute of Advanced Industrial Science and Technology, Cyclochem Co., Ltd.
    Inventors: Renu Wadhwa, Sunil Kaul, Keiji Terao, Yoshiyuki Ishida
  • Publication number: 20160334364
    Abstract: There are provided (i) a gel for use in polyacrylamide gel electrophoresis which gel produces a concentration effect for a longer time period and prevents heat generation during migration and (ii) an electrophoresis apparatus provided with the gel. A gel according to the present invention for use in polyacrylamide gel electrophoresis includes a concentration gel and a separation gel having a pH adjusted to a value different from the pH value of the concentration gel, an acrylamide buffer being covalently bonded to at least one of the concentration gel and the separation gel.
    Type: Application
    Filed: December 4, 2014
    Publication date: November 17, 2016
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Hideki KINOSHITA, Kimihiko YABE, Yoshiyuki ISHIDA
  • Patent number: 9423491
    Abstract: A radar device that transmits a high frequency signal and detects an object by a reflected wave that is reflected by the object includes a transmitting antenna that transmits the high frequency signal, a receiving antenna that receives a reflected wave that is transmitted by the transmitting antenna and reflected by the object, and a dummy antenna that attenuates a reflected wave that is reflected by a structure arranged on a transmission path of the high frequency signal. The dummy antenna is configured be selectable as an antenna having another function.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: August 23, 2016
    Assignees: Furukawa Electric Co., Ltd., Furukawa Automotive Systems Inc.
    Inventors: Yoshiyuki Ishida, Sadao Matsushima
  • Publication number: 20150378006
    Abstract: A radar device that transmits a high frequency signal and detects an object by a reflected wave that is reflected by the object includes a transmitting antenna that transmits the high frequency signal, a receiving antenna that receives a reflected wave that is transmitted by the transmitting antenna and reflected by the object, and a dummy antenna that attenuates a reflected wave that is reflected by a structure arranged on a transmission path of the high frequency signal. The dummy antenna is configured be selectable as an antenna having another function.
    Type: Application
    Filed: September 3, 2015
    Publication date: December 31, 2015
    Inventors: Yoshiyuki ISHIDA, Sadao MATSUSHIMA
  • Patent number: 9082785
    Abstract: A high-frequency circuit board capable of easily forming a bias line whose resonance frequency is sufficiently separated from operating frequency is provided. On a high-frequency circuit board 100, by electrically connecting a bias line 11 to a high-frequency circuit 10 using blind via holes 106 and 107, it is possible to limit the route that has a possibility of producing resonance only to the bias line connecting the ends 106a and 107a of the blind via holes 106 and 107 to the bias line 11. By adjusting the route length from the end 106a to the end 107a, it is possible to prevent production of resonance in the vicinity of the operating frequency.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: July 14, 2015
    Assignees: FURUKAWA ELECTRIC CO., LTD., FURUKAWA AUTOMOTIVE SYSTEMS INC.
    Inventors: Yoshiyuki Ishida, Sadao Matsushima, Toshihide Fukuchi
  • Publication number: 20150010867
    Abstract: An electrophoresis gel, in which a good pH gradient or concentration gradient of a gel-forming monomer is formed, is produced. In addition, the production efficiency of an electrophoresis reaction tool is improved and the production processes are simplified. At least one of a first process to add a gel-forming monomer to a first solution containing an initiator to initiate polymerization of the gel-forming monomer by external energy in such a way that a pH gradient or concentration gradient of the gel-forming monomer is formed and a second process to initiate the polymerization of the above-described gel-forming monomer in the first solution, to which the above-described gel-forming monomer has been added, by using the above-described external energy is included.
    Type: Application
    Filed: February 26, 2013
    Publication date: January 8, 2015
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Ohki, Hiroshi Yamaki, Tsuyoshi Tanaka, Yoshiyuki Ishida, Yutaka Unuma, Yuji Maruo
  • Publication number: 20140374260
    Abstract: With intent to increase the number of sample spots separated through two-dimensional electrophoresis and to enhance the intensity in detection of the spots, a two-dimensional electrophoresis kit includes a first medium 7 for first dimensional electrophoresis, a second medium 8 for second dimensional electrophoresis, and a casing 20 that contains at least the first medium 7 and the second medium 8, wherein the first medium 7 is formed by supplying, to the casing 20, a first solution containing a sample on which the first dimensional electrophoresis is to be performed, and the first medium 7 and the second medium 8 are contained close to each other.
    Type: Application
    Filed: February 6, 2013
    Publication date: December 25, 2014
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Ohki, Tsuyoshi Tanaka, Hiroshi Yamaki, Yoshiyuki Ishida, Yutaka Unuma, Yuji Maruo
  • Patent number: 8745813
    Abstract: The invention is based on a wiper blade (10) with a supporting element (12) which has two interconnected spring rails (30), and with a wiper strip (14) which is received by the spring rails (30) in a manner allowing it to be exchanged. It is proposed that one end of the wiper strip (14) is connected fixedly to a thickened portion (74, 98, 100, 108, 110, 112, 114) by means of which the wiper strip (14) can be fixed relative to the supporting element (12).
    Type: Grant
    Filed: August 13, 2007
    Date of Patent: June 10, 2014
    Assignees: Robert Bosch GmbH, Toyota Jidosha Kabushiki Kaisha
    Inventors: Yoshiyuki Ishida, Christian Wilms, Yutaka Yamada, Wim Verboven, Frank Diedrich, Mohamed Aznag, Ishikawa Yoshiki, Bernard Behr, Hubert Verelst
  • Publication number: 20130000956
    Abstract: A high-frequency circuit board capable of easily forming a bias line whose resonance frequency is sufficiently separated from operating frequency is provided. On a high-frequency circuit board 100, by electrically connecting a bias line 11 to a high-frequency circuit 10 using blind via holes 106 and 107, it is possible to limit the route that has a possibility of producing resonance only to the bias line connecting the ends 106a and 107a of the blind via holes 106 and 107 to the bias line 11. By adjusting the route length from the end 106a to the end 107a, it is possible to prevent production of resonance in the vicinity of the operating frequency.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 3, 2013
    Applicants: Furukawa Automotive Systems Inc., Furukawa Electric Co., Ltd.
    Inventors: Yoshiyuki ISHIDA, Sadao Matsushima, Toshihide Fukuchi
  • Publication number: 20110126373
    Abstract: The invention is based on a wiper blade (10) with a supporting element (12) which has two interconnected spring rails (30), and with a wiper strip (14) which is received by the spring rails (30) in a manner allowing it to be exchanged. It is proposed that one end of the wiper strip (14) is connected fixedly to a thickened portion (74, 98, 100, 108, 110, 112, 114) by means of which the wiper strip (14) can be fixed relative to the supporting element (12).
    Type: Application
    Filed: August 13, 2007
    Publication date: June 2, 2011
    Applicants: ROBERT BOSCH GMBH, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Yoshiyuki Ishida, Christian Wilms, Yutaka Yamada, Wim Verboven, Frank Diedrich, Mohamed Aznag, Ishikawa Yoshiki, Bernard Behr, Hubert Verelst
  • Patent number: 7911874
    Abstract: An interface conversion macro converts a signal compliant with a system interface specification output from a controller to a signal compliant with a memory interface specification, and outputs the same to a memory interface part, and it also converts a signal output from the memory macro to a signal compliant with the system interface specification and outputs the same to the controller. By converting the system interface specification and the memory interface specification to each other by an interface conversion macro, a common memory macro can be mounted on a semiconductor integrated circuit even when the system interface specification differs. Accordingly, when designing a system, the design verification time, evaluation time, and test time of the semiconductor integrated circuit can be reduced. As a result, the design time and design cost of the semiconductor integrated circuit can be reduced.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: March 22, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Kuninori Kawabata, Yoshiyuki Ishida, Satoshi Eto
  • Patent number: 7714429
    Abstract: A semiconductor device that reduces the size and cost of functional macro chips used in a chip-on-chip configuration. Functional macro chips each include a macro region. The macro regions are formed adjacent to one another. A pad region for testing the functional macro chips is formed surrounding the macro regions.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: May 11, 2010
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Shouji Sakuma, Yoshiyuki Ishida
  • Publication number: 20080298159
    Abstract: An interface conversion macro converts a signal compliant with a system interface specification output from a controller to a signal compliant with a memory interface specification, and outputs the same to a memory interface part, and it also converts a signal output from the memory macro to a signal compliant with the system interface specification and outputs the same to the controller. By converting the system interface specification and the memory interface specification to each other by an interface conversion macro, a common memory macro can be mounted on a semiconductor integrated circuit even when the system interface specification differs. Accordingly, when designing a system, the design verification time, evaluation time, and test time of the semiconductor integrated circuit can be reduced. As a result, the design time and design cost of the semiconductor integrated circuit can be reduced.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 4, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Kuninori Kawabata, Yoshiyuki Ishida, Satoshi Eto
  • Patent number: 7459960
    Abstract: It is intended to provide a semiconductor integrated circuit device and adjustment method of the same semiconductor integrated circuit device, capable of adjusting an analog signal outputted from an incorporated analog signal generating section without outputting it outside as an analog value. An analog signal AOUT is outputted from an analog signal generating section 3 in which an adjustment signal AD is inputted. The analog signal AOUT is inputted to a judgment section 1, in which it is compared and judged with a predetermined value and then a judgment signal JG is outputted. The judgment signal JG acts on a predetermined signal storing section 4 as an internal signal and the adjustment signal AD is fetched into the predetermined signal storing section 4. Further, the judgment signal JG is outputted as digital signal through an external terminal T2 and an external tester device acquires the adjustment signal and stores the acquired adjustment signal in the predetermined signal storing section 4.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: December 2, 2008
    Assignee: Fujitsu Limited
    Inventors: Yasushige Ogawa, Yoshiyuki Ishida, Masato Matsumiya
  • Publication number: 20070222045
    Abstract: A semiconductor device that reduces the size and cost of functional macro chips used in a chip-on-chip configuration. Functional macro chips each include a macro region. The macro regions are formed adjacent to one another. A pad region for testing the functional macro chips is formed surrounding the macro regions.
    Type: Application
    Filed: September 28, 2006
    Publication date: September 27, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Shouji Sakuma, Yoshiyuki Ishida
  • Patent number: 7167042
    Abstract: A semiconductor device includes both a logic circuit and a macro circuit. The macro circuit includes a circuit that consumes direct current (DC). In order to conserve power and allow for testing, the consumption of DC by the current consumption circuit can be stopped with a stop signal, which stops the operation of the macro circuit. The macro circuit can be restarted or returned to normal operation mode without risk of error caused by the stopping of the macro circuit.
    Type: Grant
    Filed: January 15, 2004
    Date of Patent: January 23, 2007
    Assignee: Fujitsu Limited
    Inventors: Yasushige Ogawa, Yoshiyuki Ishida
  • Publication number: 20060214724
    Abstract: It is intended to provide a semiconductor integrated circuit device and adjustment method of the same semiconductor integrated circuit device, capable of adjusting an analog signal outputted from an incorporated analog signal generating section without outputting it outside as an analog value. An analog signal AOUT is outputted from an analog signal generating section 3 in which an adjustment signal AD is inputted. The analog signal AOUT is inputted to a judgment section 1, in which it is compared and judged with a predetermined value and then a judgment signal JG is outputted. The judgment signal JG acts on a predetermined signal storing section 4 as an internal signal and the adjustment signal AD is fetched into the predetermined signal storing section 4. Further, the judgment signal JG is outputted as digital signal through an external terminal T2 and an external tester device acquires the adjustment signal and stores the acquired adjustment signal in the predetermined signal storing section 4.
    Type: Application
    Filed: June 1, 2006
    Publication date: September 28, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Yasushige Ogawa, Yoshiyuki Ishida, Masato Matsumiya