Abstract: When a hand shake reducing mode has been set for shooting a subject, an exposure is controlled in accordance with a program diagram (solid line) B for the shake reducing mode, which is different from a program diagram (broken line) A for a normal mode. In a state where a shutter speed is set to less than “ 1/80”, two-pixel addition and/or four-pixel addition is executed on an imaging signal to amplify subject luminance, raising ISO sensitivity. A shutter speed set to fall in a high speed range reduces deterioration in image quality due to hand shake and/or subject movement during a shooting operation.

Abstract: A setting unit selects and sets one of a plurality of commercial power frequencies. A frame rate setting unit sets a frame rate corresponding to the commercial power frequency set by the setting unit. A control unit controls an imaging unit such that imaging is carried out at the frame rate set by the frame rate setting unit to thereby acquire image data successively. A detection unit detects a scanning line part at which luminance changes to differ between image data items successively acquired by the control unit. A changing unit changes the commercial power frequency set by the setting unit in accordance with a detection result obtained by the detection unit.

Abstract: An image synthesis device includes a matrix memory for storing matrix information for bringing subregions of each of inputted images into correspondence with subregions of an outputted image, and a vector graphic processing unit for drawing a vector graphic of each of graphic regions according to graphic data in a vector form defined by both vertex data for defining the shape of each of the graphic regions into which the outputted image is divided, and a drawing command for specifying contents-to-be-drawn of the vertex data, and performs a coordinate transformation process on the vector graphic by using a correspondence defined by the matrix information to calculate texture coordinates of the inputted images, and displays synthesized image data which the image synthesis device calculates by using image element data about the inputted images, the image element data corresponding to the texture coordinates, as the outputted image.

Abstract: An FPGA-design-CAD interface unit retrieves pin assignment information created by an FPGA-designing CAD apparatus. An FPGA-pin-information managing unit manages the pin assignment information as FPGA pin information. A temporary-library creating unit creates a temporary component shape type library by using the FPGA pin information and outputs the temporary component shape type library in a form capable of being read by a package-designing CAD apparatus to a file.

Abstract: In a digital camera, in an automatic shooting stand-by state, when it is judged that an automatic shooting condition has not been satisfied, it is judged whether or not to issue an AE re-processing command (that is, it is judged whether or not the current shooting condition is similar to a condition where the automatic shooting condition is satisfied). When it is judged to issue the AE re-processing command, exposure tracking in an aperture-priority mode is performed, and shooting exposure conditions excluding the aperture value for still-image shooting in the aperture-priority mode are determined. Then, storage is updated. When it is judged that an automatic shooting condition has been satisfied, record processing for still-image shooting is performed with the updated shooting exposure conditions without changing the aperture value.

Abstract: An imaging apparatus including: an imaging section that sequentially takes images of an object; a moving image recording section that sequentially records the images of the object as a series of moving image data; an adjuster that adjusts an imaging condition for imaging the object in accordance with a change in state of the object during imaging and recording of the series of moving image data; a switching section that switches between a first recording frame rate and a second recording frame rate that is higher than the first recording frame rate; and an adjustment controller that controls adjustment of the imaging condition made by the adjuster during the recording of the moving image data at the second recording frame rate, when the switching section switches from the first recording frame rate to the second recording frame rate.

Abstract: A video signal processing apparatus according to an embodiment includes: a sharpening processing circuit configured to perform processing of sharpening a multiple parallax video concerning an input video signal; a viewing zone boundary improvement processing circuit configured to perform processing of improving a viewing zone boundary of the multiple parallax video subjected to the sharpening processing; and a viewing zone expansion processing circuit configured to perform processing of expanding a viewing zone on the multiple parallax video subjected to the viewing zone boundary improvement processing.

Abstract: An image recording device includes an obtaining module configured to obtain tilt information indicating a tilt direction and a tilt angle of an image with respect to a horizontal direction for a processing unit including frames, a rotational processing module configured to perform, in accordance with the tilt direction and the tilt angle indicated by the tilt information, a rotational process having a same rotational direction and a same rotational amount for correction of tilting with respect to images of the frames, and a storing module configured to store the images of the frames subjected to the rotational process.

Abstract: An FPGA-information managing unit included in a circuit-designing CAD apparatus retrieves FPGA information, such as pin-assignment information and attribute information, that is created by an FPGA-designing CAD apparatus. A library creating unit creates a symbol library by using the FPGA information. A pin-swap processing unit retrieves pin swap information from a package-designing CAD apparatus, and reflect the pin swap in the symbol library, the FPGA information, a circuit diagram, and a constrained condition.

Abstract: An FPGA-design-CAD interface unit retrieves pin assignment information created by an FPGA-designing CAD apparatus. An FPGA-pin-information managing unit manages the pin assignment information as FPGA pin information. A temporary-library creating unit creates a temporary component shape type library by using the FPGA pin information and outputs the temporary component shape type library in a form capable of being read by a package-designing CAD apparatus to a file.

Abstract: Disclosed is a vector graphic drawing device in which when drawing a plurality of graphics, an outline drawing unit 12 stores outline information about the plurality of graphics in an outline buffer 13, and, when creating pixels, a pixel creating unit 14 refers to the outline information about the plurality of graphics stored in the outline buffer 13 to determine a color of each pixel in a portion in which the plurality of graphics overlap one another, and draws the pixels in a frame buffer 16. Accordingly, a duplicated drawing process is prevented from being performed on the portion in which the plurality of graphics overlap one another. As a result, the graphic drawing can be speeded up.

Abstract: A method of supplying an etching gas includes: supplying a first etching gas used in an etching process into a processing container; and supplying a second etching gas used in the etching process into the processing container, in which, when the first etching gas and the second etching gas are switched therebetween, only a small amount of a gas, which is needed as an etching gas before the switching and is not needed as an etching gas after the switching, is continuously supplied into the processing container.

Abstract: The invention is provided to perform exposure control that uses a diagram for monitor-through in a shooting waiting state in which the output frame rate of an image sensor is set into 30 fps and that for high-speed movie recording is performed during move images shooting with the high-speed movie mode in which the output frame rate is set into 300 fps. Upon shifting to exposure control at the high-speed movie mode, the aperture value to be first set is determined uniquely from the current LV value by using a program diagram for preparing to start high-speed movie recording in which the space scale of the program diagram for monitor-through is converted into a space scale similar to that of the diagram for high-speed movie recording. Then, the exposure adjustment that sets the determined aperture value, and the shutter speed and the gain corresponding to thereof as exposure control values.

Abstract: An image processing circuit/CPU performs AF processing in response to a halfway shutter operation and upon confirmation of a shooting shutter instruction causes a light emitting unit in a flash circuit to emit light, and decides an amount of light to be emitted at a shooting time based on a brightness component of an output signal of an imaging element, whereby a subject distance is calculated from the amount of light emitted at shooting time, and wherein, when the in-focus decision in the AF processing is negative, an optical lens is moved by a lens drive circuit to a position corresponding to the subject distance which has been acquired based on the amount of light emitted at the shooting time, and a shooting operation is then performed.

Abstract: In a digital camera, in an automatic shooting stand-by state, when it is judged that an automatic shooting condition has not been satisfied, it is judged whether or not to issue an AE re-processing command (that is, it is judged whether or not the current shooting condition is similar to a condition where the automatic shooting condition is satisfied). When it is judged to issue the AE re-processing command, exposure tracking in an aperture-priority mode is performed, and shooting exposure conditions excluding the aperture value for still-image shooting in the aperture-priority mode are determined. Then, storage is updated. When it is judged that an automatic shooting condition has been satisfied, record processing for still-image shooting is performed with the updated shooting exposure conditions without changing the aperture value.

Abstract: A banknote processing apparatus according to the present invention includes a banknote separating and feeding portion which separates, from banknotes, one feed-out banknote closest to a banknote holding portion, and feeds out the feed-out banknote. The banknote separating and feeding portion includes a feed roller, a separating roller, a kick-on roller, and auxiliary rollers. The auxiliary rollers are positioned on an opposite side of the kick-on roller from the feed roller, protrude onto the banknote pressing portion side beyond the banknote holding surface, and contact with the feed-out banknote. Each of the auxiliary rollers has a plurality of large diameter portions formed intermittently in a circumferential direction of the auxiliary roller. The auxiliary rollers are positioned on the same axis and apart from each other such that phases of mutually adjacent auxiliary rollers in a rotation direction of the auxiliary rollers are offset from each other.

Abstract: In a digital camera 1, in an automatic shooting stand-by state, when judged at Step S26 that an automatic shooting condition has been satisfied (N at Step S26), whether or not to issue an AE re-processing command is judged. In other words, whether or not the current shooting condition is similar to a condition where an automatic shooting condition is satisfied is judged. When judged to issue the AE re-processing command, exposure tracking in an aperture-priority mode is performed (S28), and shooting exposure conditions excluding the aperture value for still-image shooting in the aperture-priority mode are determined. Then, the storage is updated (Step 29), and the process returns to Step S26. When judged at Step S26 that an automatic shooting condition has been satisfied (Y at Step S26), record processing for still-image shooting is performed with the updated shooting exposure conditions without changing the aperture value (Step S30).

Abstract: When the mode is set to a strobe consecutive shooting mode, an imaging apparatus sets the mode to a pixel addition drive mode for reading out image data using pixel addition drive, performs metering operation using preliminary flashing and calculates an appropriate amount of flashing on the basis of the metering operation. Next, the imaging apparatus judges whether or not it is possible to flash three times consecutively with the calculated amount of flashing. If it is judged that it is not possible to flash three times consecutively with the calculated amount of flashing, the imaging apparatus limits the amount of flashing to the largest amount of flashing within the range of amounts of flashing with which flashing of strobe light three times consecutively is possible, and performs strobe consecutive shooting with the limited amount of flashing.

Abstract: An FPGA-design-CAD interface unit retrieves pin assignment information created by an FPGA-designing CAD apparatus. An FPGA-pin-information managing unit manages the pin assignment information as FPGA pin information. A temporary-library creating unit creates a temporary component shape type library by using the FPGA pin information and outputs the temporary component shape type library in a form capable of being read by a package-designing CAD apparatus to a file.

Abstract: An FPGA-information managing unit included in a circuit-designing CAD apparatus retrieves FPGA information, such as pin assignment information and attribute information, that is created by an FPGA-designing CAD apparatus. A library creating unit creates a symbol library by using the FPGA information. When creating a symbol library, if an FPGA subjected to create the symbol library is arranged in the circuit diagram, the library creating unit manages not to change a portion dividing and a pin layout of the existing symbol library arranged in the circuit diagram as much as possible. When arranging a symbol of the FPGA that a symbol library is newly created, a circuit-diagram reflecting unit arranges the symbol without changing the existing layout.