Patents by Inventor Yoshiyuki Miyamoto
Yoshiyuki Miyamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090016870Abstract: A turbofan engine of the invention is provided with a fan first-stage moving blade for taking an air therein, and a spinner rotationally driving the fan first-stage moving blade, the spinner has a spiral blade extending spirally to an outer side in a radial direction, sucking the air from a front face of the spinner and supplying the air to the fan first-stage moving blade. Further, the fan first-stage moving blade and the spinner are integrally coupled, and the spiral blade and the fan first-stage moving blade are formed such that blade surfaces are smoothly connected.Type: ApplicationFiled: January 26, 2006Publication date: January 15, 2009Applicant: ISHIKAWAJIMA-HARIMA HEAVY INDUSTRIES CO., LTD.Inventors: Hidekazu Kodama, Shinya Goto, Ikuhisa Mizuta, Yoshiyuki Miyamoto, Takeshi Murooka
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Patent number: 7346412Abstract: The invention intends to provide a manufacturing method of a semiconductor integrated circuit device, which can detect an off-specification faulty wafer in real time. An abnormality detection server stores apparatus log data outputted from semiconductor manufacturing apparatus that processes a semiconductor wafer in an apparatus log data memory. Thereafter, in a lot end signal receiver, when a lot end signal outputted from the semiconductor manufacturing apparatus is received, an abnormal data detector, after referencing an abnormality detection condition setting file stored in a first detection condition memory, based on the referenced content, judges whether there are abnormal data in the apparatus log data stored in the apparatus log data memory or not. Upon detecting an abnormality, a detection result is outputted to an engineer PC and an operator terminal unit.Type: GrantFiled: October 26, 2004Date of Patent: March 18, 2008Assignee: Renesas Technology Corp.Inventors: Kazuyuki Tokorozuki, Toshihiro Nakajima, Yoshiyuki Miyamoto, Yoshio Fukayama
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Publication number: 20070097763Abstract: The invention intends to provide a manufacturing method of a semiconductor integrated circuit device, which can detect an off-specification faulty wafer in real time. An abnormality detection server stores apparatus log data outputted from semiconductor manufacturing apparatus that processes a semiconductor wafer in an apparatus log data memory. Thereafter, in a lot end signal receiver, when a lot end signal outputted from the semiconductor manufacturing apparatus is received, an abnormal data detector, after referencing an abnormality detection condition setting file stored in a first detection condition memory, based on the referenced content, judges whether there are abnormal data in the apparatus log data stored in the apparatus log data memory or not. Upon detecting an abnormality, a detection result is outputted to an engineer PC and an operator terminal unit.Type: ApplicationFiled: October 26, 2004Publication date: May 3, 2007Applicant: RENESAS TECHNOLOGY CORP.Inventors: Kazuyuki Tokorozuki, Toshihiro Nakajima, Yoshiyuki Miyamoto, Yoshio Fukayama
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Patent number: 7189681Abstract: For provides a superconducting material comprising highly chemically stable Fullerene carbon molecules having a relatively high transition temperature and high chemical stability, C20 Fullerene molecules having stronger electron-lattice interaction than that of C60 Fullerene molecules are used, in order to polymerize the C20 Fullerene molecules into a one-dimensional chain, C20 is incorporated in a gap of a material having a large band gap between a valence band and a conduction band, thereafter, electrons or positive holes are injected into the obtained C20 Fullerene chain polymer via an electric field application for phase transition to a superconductor.Type: GrantFiled: December 26, 2001Date of Patent: March 13, 2007Assignee: NEC CorporationInventor: Yoshiyuki Miyamoto
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Publication number: 20060286022Abstract: According to the present invention, there are provided a novel graphite-like three-dimensional structure which has a partial structure bent-up with such a steeper curvature than that observed for a carbonaceous material having a conventional nanosize three-dimensional structure such as fullerene and nanotube, has such a feature as light weight and high mechanical strength, as well as a process for manufacturing the same.Type: ApplicationFiled: May 20, 2004Publication date: December 21, 2006Inventors: Yoshiyuki Miyamoto, Takazumi Kawai
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Publication number: 20060265789Abstract: To realize a transistor with a channel and a gate, both being formed with nanotubes, by joining the nanotubes in the form of SP3 bonding, a substrate, on which a pair of source and drain electrodes 27, and a gate terminal 28 are formed, is prepared (Fig. (a)), and then a catalytic layer 20 is formed at the one of the source and drain electrodes 27 (Fig. (b)). A first CNT 23 is formed (Fig. (d)) between the pair of source and drain electrodes 27 by growing the CNT (Fig. (c)) in which the catalytic layer 20 is a core. A second CNT 24 is picked by a holding means 25, and after a cap is eliminated and an opening portion is cleaned using the electron beam as needed, the opening portion is contacted to the side of the first CNT 23, thereby joining the two CNT (fig. (e)). The other end portion of the second CNT 24 is positioned at the gate terminal 28 (Fig. (f)). End portions of the CNT are fixed on the electrodes and the terminal by selectively irradiating metallic ion.Type: ApplicationFiled: February 16, 2006Publication date: November 23, 2006Inventors: Takazumi Kawai, Yoshiyuki Miyamoto
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Publication number: 20060049033Abstract: This invention provides a process for preparing a reactive graphite-like layered material with high chemical reactivity while maintaining stability of a base material. In the preparation process according to this invention, first, the treatment for reducing the number of dangling bonds in the vicinity of the vacancy to form an introducing site is conducted by binding atoms together with each other, which atoms are adjacent to a vacancy in a graphite-like layered material. Then, atoms 3 and 4 to be introduced, i.e., a diatomic molecule made of atoms constituting the graphite-like layered material are introduced into the introducing site formed in advance. Then, new bonds are generated between introduced atoms 3, 4 and the graphite-like layered material.Type: ApplicationFiled: August 21, 2003Publication date: March 9, 2006Inventor: Yoshiyuki Miyamoto
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Patent number: 6995367Abstract: A near-field light detecting apparatus providing a high spatial resolution comprises a near-field light sensor for converting near-field light from the surface of a sample into an electric signal, and a voltage source for applying a predetermined voltage to the near-field light sensor through wires. The near-field light sensor comprises a nanotube which has an insulating property in a predetermined area. Electronic excitation is induced by the near-field light in two areas separated by the insulating area to convert the near-field light into the electric signal.Type: GrantFiled: April 17, 2003Date of Patent: February 7, 2006Assignee: NEC CorporationInventor: Yoshiyuki Miyamoto
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Patent number: 6896861Abstract: Dangling bonds of silicon atoms tend to take place in silicon oxide grown on a silicon wafer due to oxygen deficiency; hypofluorous acid is introduced into the silicon oxide so that the hypofluorous acid reaches the dangling bonds through diffusion; the hypofluorous acid is decomposed into fluorine atoms and hydroxyl groups, and the fluorine atoms and hydroxyl groups deactivate the dangling bonds of silicon atoms; even if electric charges are injected into the silicon oxide, the deactivation is never broken so that the silicon oxide layer is stable and highly reliable.Type: GrantFiled: July 11, 2002Date of Patent: May 24, 2005Assignee: NEC CorporationInventor: Yoshiyuki Miyamoto
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Patent number: 6841321Abstract: A method and a system for processing a semiconductor device intended to improve the overlay accuracy of a semiconductor device product, particularly in its device area, in carrying out the mix-and-match exposure process are designed to calculate the difference of exposure distortions between two layers in the device area and the difference of exposure distortions between the two layers at the overlay measurement mark position from data of exposure field distortions of two exposure tools used for the mix-and-match exposure process and data of device area and overlay measurement mark position of the product, calculate a modification value which relates both differences to each other, calculate a first exposure condition correction value from the measurement result of overlay, and carry out the exposure process based on a second exposure condition correction value which is evaluated by modifying the first exposure condition correction value with the modification value.Type: GrantFiled: January 23, 2002Date of Patent: January 11, 2005Assignee: Hitachi, Ltd.Inventors: Shunichi Matsumoto, Yasuhiro Yoshitake, Yoshiyuki Miyamoto
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Patent number: 6797442Abstract: An average value of dimensions of resist patterns formed each time exposure processing is effected on semiconductor substrates of a predetermined number of lots, is compared with a target dimension. When a drift between each of the dimensions of the formed resist patterns and the target dimension is larger than a first value, exposure energy is corrected with a relatively large correction value &agr;1. When the drift between each of the dimensions of the formed resist patterns and the target dimension is smaller than the first value and larger than a second value, exposure energy is corrected with a relatively small correction value &agr;2. When the drift between each of the dimensions of the formed resist patterns and the target dimension is smaller than the second value, no exposure energy is corrected. Exposure processing is effected on a semiconductor substrate of the next lot by using the calculated exposure energy.Type: GrantFiled: July 9, 2003Date of Patent: September 28, 2004Assignee: Renesas Technology Corp.Inventors: Kazuyuki Tokorozuki, Tetsuji Yokouchi, Yoshiyuki Miyamoto, Koji Yamamoto
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Patent number: 6709471Abstract: A battery material which has following constitution: a single-layer carbon nanotube having a small diameter is placed into a single-layer carbon nanotube having a large diameter such that the nanotubes are isolated from each other, a boron nitride nanotube is used as an insulating layer, and the carbon nanotubes and the boron nitride nanotube have a common tube axis; and this material is reduced in mass with respect to a charging capacity, improved in power supply, and free from deterioration.Type: GrantFiled: June 18, 2001Date of Patent: March 23, 2004Assignee: NEC CorporationInventor: Yoshiyuki Miyamoto
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Publication number: 20040029369Abstract: An average value of dimensions of resist patterns formed each time exposure processing is effected on semiconductor substrates of a predetermined number of lots, is compared with a target dimension. When a drift between each of the dimensions of the formed resist patterns and the target dimension is larger than a first value, exposure energy is corrected with a relatively large correction value &agr;1. When the drift between each of the dimensions of the formed resist patterns and the target dimension is smaller than the first value and larger than a second value, exposure energy is corrected with a relatively small correction value &agr;2. When the drift between each of the dimensions of the formed resist patterns and the target dimension is smaller than the second value, no exposure energy is corrected. Exposure processing is effected on a semiconductor substrate of the next lot by using the calculated exposure energy.Type: ApplicationFiled: July 9, 2003Publication date: February 12, 2004Applicant: Renesas Technology Corp.Inventors: Kazuyuki Tokorozuki, Tetsuji Yokouchi, Yoshiyuki Miyamoto, Koji Yamamoto
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Publication number: 20030197120Abstract: A near-field light detecting apparatus providing a high spatial resolution comprises a near-field light sensor for converting near-field light from the surface of a sample into an electric signal, and a voltage source for applying a predetermined voltage to the near-field light sensor through wires. The near-field light sensor comprises a nanotube which has an insulating property in a predetermined area. Electronic excitation is induced by the near-field light in two areas separated by the insulating area to convert the near-field light into the electric signal.Type: ApplicationFiled: April 17, 2003Publication date: October 23, 2003Applicant: NEC CorporationInventor: Yoshiyuki Miyamoto
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Patent number: 6531091Abstract: A muffler of a muffler made of a titanium alloy wherein advantages of lightness and corrosion-resistance that the titanium alloy originally has are used, and heat-resistance and oxidization-resistance are heightened without damaging costs or workability so that the span of life and flexibility for design are improved. A muffler made of a titanium alloy, wherein the titanium alloy comprises 0.5-2.3% by mass of Al and optionally one or more other alloying elements. The metal texture may comprise more than 90% by volume of the &agr; phase and 20% or less of the &bgr; phase. This muffler is superior in heat-resistance, oxidization-resistance, weldability and so on.Type: GrantFiled: February 15, 2001Date of Patent: March 11, 2003Assignee: Kobe Steel, Ltd.Inventors: Yoshiyuki Miyamoto, Takashi Yashiki
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Publication number: 20030017347Abstract: Dangling bonds of silicon atoms tend to take place in silicon oxide grown on a silicon wafer due to oxygen deficiency; hypofluorous acid is introduced into the silicon oxide so that the hypofluorous acid reaches the dangling bonds through diffusion; the hypofluorous acid is decomposed into fluorine atoms and hydroxyl groups, and the fluorine atoms and hydroxyl groups deactivate the dangling bonds of silicon atoms; even if electric charges are injected into the silicon oxide, the deactivation is never broken so that the silicon oxide layer is stable and highly reliable.Type: ApplicationFiled: July 11, 2002Publication date: January 23, 2003Applicant: NEC CORPORATIONInventor: Yoshiyuki Miyamoto
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Publication number: 20020111038Abstract: A method and a system for processing a semiconductor device intended to improve the overlay accuracy of a semiconductor device product, particularly in its device area, in carrying out the mix-and-match exposure process are designed to calculate the difference of exposure distortions between two layers in the device area and the difference of exposure distortions between the two layers at the overlay measurement mark position from data of exposure field distortions of two exposure tools used for the mix-and-match exposure process and data of device area and overlay measurement mark position of the product, calculate a modification value which relates both differences to each other, calculate a first exposure condition correction value from the measurement result of overlay, and carry out the exposure process based on a second exposure condition correction value which is evaluated by modifying the first exposure condition correction value with the modification value.Type: ApplicationFiled: January 23, 2002Publication date: August 15, 2002Inventors: Shunichi Matsumoto, Yasuhiro Yoshitake, Yoshiyuki Miyamoto
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Publication number: 20020086800Abstract: For provides a superconducting material comprising highly chemically stable Fullerene carbon molecules having a relatively high transition temperature and high chemical stability, C20 Fullerene molecules having stronger electron-lattice interaction than that of C60 Fullerene molecules are used, in order to polymerize the C20 Fullerene molecules into a one-dimensional chain, C20 is incorporated in a gap of a material having a large band gap between a valence band and a conduction band, thereafter, electrons or positive holes are injected into the obtained C20 Fullerene chain polymer via an electric field application for phase transition to a superconductor.Type: ApplicationFiled: December 26, 2001Publication date: July 4, 2002Inventor: Yoshiyuki Miyamoto
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Patent number: 6404911Abstract: A semiconductor failure analysis system and method therefor facilitated by a failure information collection unit for collection, by bit, failure information of a semiconductor, an inspection unit for examining relations between various types of inspection data obtained by inspection of the semiconductor and for examining relations between the inspection data and failure information, a storage unit for storing design information of the semiconductor, an analysis unit for analyzing the failure information from the failure information collection unit, from the inspection unit and design information stored in the storage unit, a display unit for displaying at least one of the result of analysis from the analysis unit and the failure information, a failure cause estimation unit for estimating a cause of the failure information, and a unit for feeding the estimated cause of the failure information back to a process in which the failure has occurred.Type: GrantFiled: December 8, 2000Date of Patent: June 11, 2002Assignee: Hitachi, Ltd.Inventors: Kazuko Ishihara, Seiji Ishikawa, Masao Sakata, Isao Miyazaki, Yoshiyuki Miyamoto, Jun Nakazato
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Publication number: 20020006547Abstract: A battery material which has following constitution: a single-layer carbon nanotube having a small diameter is placed into a single-layer carbon nanotube having a large diameter such that the nanotubes are isolated from each other, a boron nitride nanotube is used as an insulating layer, and the carbon nanotubes and the boron nitride nanotube have a common tube axis; and this material is reduced in mass with respect to a charging capacity, improved in power supply, and free from deterioration.Type: ApplicationFiled: June 18, 2001Publication date: January 17, 2002Inventor: Yoshiyuki Miyamoto