Patents by Inventor Yoshiyuki Morihiro

Yoshiyuki Morihiro has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5443659
    Abstract: Flux for soldering comprising inorganic ion-exchanger and activator containing halogen atom, solder composition the flux and solder particles, soldering method comprising coating the solder composition on a portion for soldering, soldering method comprising coating flux containing activator on a portion for soldering, applying inorganic ion-exchanger to the portion and applying solder to the portion, and soldering method comprising mixing inorganic ion-exchanger with creamy solder to give mixture, coating the mixture on a circuit pattern of a wiring plate and heating the wiring plate. The flux for soldering and the soldering composition are excellent in metal ion-migration resistance, corrosion resistance, soldering property and storage stability, and can be preferably used without cleaning and the soldering methods can be preferably used in practical no-clean soldering methods.
    Type: Grant
    Filed: November 3, 1994
    Date of Patent: August 22, 1995
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuhiro Nonogaki, Junji Fujino, Akira Adachi, Kohei Murakami, Yoshiyuki Morihiro, Osamu Hayashi
  • Patent number: 5175399
    Abstract: Disclosed herein is a wiring panel constructed with a substrate; an electrically conductive member laminated on the substrate and principally composed of copper; and an insulating member composed of an organic substance, wherein a very small amount of a non-metallic element is incorporated into the electrically conductive member, and a very small amount of a metal element is incorporated into the insulating member.Also disclosed herein is a method for producing a wiring panel constructed with a substrate, an electrically conductive member provided on the substrate and composed of copper as the principal constituent, and an insulating layer of an organic substance covering the conductive member, which comprises steps of: applying onto the surface of the electrically conductive member a surface-reforming layer which functions to suppress electron transfer through the surface of the electrically conductive member, and thereafter forming the organic insulating layer on the electrically conductive member.
    Type: Grant
    Filed: August 27, 1990
    Date of Patent: December 29, 1992
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsumasa Mori, Eishi Gofuku, Mitsuyuki Takada, Kurumi Miyake, Yoshiyuki Morihiro, Masanobu Kohara
  • Patent number: 5034569
    Abstract: A multilayer interconnection circuit board includes insulating layers and conductor wiring layers which are alternately laminated. The uppermost conductor wiring layer is electrically connected to an intermediate conductor wiring layer to a predetermined stage by irradiating laser beams in the direction of lamination of layers so that the conductor wiring layer or layers located above the intermediate conductor wiring layer are successively molten by the laser beams. The surface irradiated by the laser beams of the conductor wiring layer at the predetermined stage is treated to reflect laser energy, and the surface of the conductor wiring layer or layers which are molten by the laser beams is treated so as to be susceptive to absorb the laser beams.
    Type: Grant
    Filed: April 5, 1990
    Date of Patent: July 23, 1991
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Eishi Gofuku, Mitsuyuki Tanaka, Yoshiyuki Morihiro, Hayato Takasago
  • Patent number: 4914815
    Abstract: In a method for manufacturing hybrid integrated circuits, a plurality of circuit patterns are formed on one surface of a board, and a connecting film is stuck onto the other surface of the board. Then, the board is divided into portions having the respective circuit patterns while leaving the connecting film intact and component parts are mounted on the portions. Finally, the individual portions are separated by cutting the connecting film. The circuit patterns may be formed over one surface of the board and covered with a connecting film. The connecting film may be a constituent element of each circuit pattern, such as an insulating layer disposed between conducting layers.
    Type: Grant
    Filed: February 21, 1989
    Date of Patent: April 10, 1990
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Hayato Takasago, Yoshiyuki Morihiro
  • Patent number: 4783642
    Abstract: A hybrid integrated circuit substrate contains an insulating substrate. On predetermined positions of the upper surface of the substrate, there are formed resistors and activation layers to be in contact with ends of the resistors. On predetermined positions of the upper surfaces of the activation layers, there are formed conductor layers electrically connected with the ends of the resistors.
    Type: Grant
    Filed: May 13, 1987
    Date of Patent: November 8, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Yoshiyuki Morihiro, Hayato Takasago
  • Patent number: 4752555
    Abstract: A first conductor layer made of a thick film conductor is formed with a predetermined pattern on a substrate. A thick film resistor is then formed to be connected to the first conductor layer. An insulating layer made of a polyimide resin is formed over the substrate, the first conductor layer and the thick film resistor with through holes on the first conductor layer. Then, plating is applied to the whole surface of the insulating layer, the wall surfaces of the through holes and the exposed portions of the first conductor layer and etching is applied thereto with a predetermined pattern so that a second conductor layer is formed.
    Type: Grant
    Filed: May 27, 1986
    Date of Patent: June 21, 1988
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Yoshiyuki Morihiro, Havato Takasago
  • Patent number: 4685203
    Abstract: A hybrid integrated circuit substrate comprising an insulating substrate. On predetermined positions of the upper surface of the substrate, there are formed cermet resistors and activation layers to be in contact with ends of the resistors. On predetermined positions of the upper surface of the activation layers, there are formed conductor layers electrically connected with the ends of the resistors through the activation layers. The activation layers are formed from an activation paste containing a catalytic metal for enabling deposition in electroless plating in glass ingredients for attaining adhesion with the insulating substrate upon firing. Electrical connection between the conductor layers and the cermet resistors occurs through the activation layers by ohmic contact effected between the cermet resistors and the conductor layers through diffusion layers formed upon firing the activation paste.
    Type: Grant
    Filed: August 1, 1984
    Date of Patent: August 11, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Yoshiyuki Morihiro, Hayato Takasago
  • Patent number: 4643798
    Abstract: In manufacturing a composite having a conductive layer on the surface of a resin layer, first the resin layer of a mixture of a resin material and filler elements is formed on a substrate and the resin material of the surface of the resin layer is selectively etched with respect to the filler elements to expose a portion of the filler elements, and then the filler elements, as exposed on the selectively etched surface of the resin layer, are selectively etched with respect to the resin material to form unevenness. Then catalyst nuclei are formed for electroless plating on the selectively etched surface having the unevenness and then a conductive metallic layer is formed by an electroless plating process on the selectively etched surface having unevenness. As a result, a composite of the above described structure is provided.
    Type: Grant
    Filed: April 9, 1985
    Date of Patent: February 17, 1987
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Yoshiyuki Morihiro, Hayato Takasago
  • Patent number: 4629681
    Abstract: A first conductor layer made of a thick film conductor is formed with a predetermined pattern on a substrate. A thick film resistor is then formed to be connected to the first conductor layer. An insulating layer made of a polyimide resin is formed over the substrate, the first conductor layer and the thick film resistor with through holes on the first conductor layer. Then, plating is applied to the whole surface of the insulating layer, the wall surfaces of the through holes and the exposed portions of the first conductor layer and etching is applied thereto with a predetermined pattern so that a second conductor layer is formed.
    Type: Grant
    Filed: November 9, 1984
    Date of Patent: December 16, 1986
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuyuki Takada, Yoshiyuki Morihiro, Hayato Takasago
  • Patent number: 4291758
    Abstract: A boiling heat transfer surface for heat transfer between a heat source and a coolant is provided. On the heat transfer surface contacting with a liquid coolant such as fluorinated hydrocarbon type liquid coolants, metallic particles having grain size of 60 mesh pass and 250 mesh nonpass (Japanese Industrial Standard sieve) are piled up and fixed by a metallic film on the heat transfer surface.
    Type: Grant
    Filed: October 3, 1979
    Date of Patent: September 29, 1981
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Masao Fujii, Yoshifusa Ogawa, Yoshiyuki Morihiro