Patents by Inventor Yoshiyuki Nakao

Yoshiyuki Nakao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120092005
    Abstract: A rotary eddy current flaw detection probe device has a plurality of ?-shaped eddy current flaw detection probes attached in a rotating disc for detecting flaws in all directions regardless of the flaw direction. Four ?-shaped eddy current testing probes P11 to P22 are arranged around the rotation center Ds1 of a rotating disc 111, and are embedded in the disc 111. The coil planes of detector coils Ds11 to Ds22 of the testing probes P11 to P22 are parallel with each other, and are perpendicular to the rotation plane of the rotating disc 111. The coil planes of the detector coils incline at an angle ? relative to a line Y passing through the centers Ps11 and Ps12 of the probes P11 and P12. The detector coils Dc11 and Dc12 are cumulatively connected to each other, and the detector coils Dc21 and Dc22 are differentially connected to each other.
    Type: Application
    Filed: November 1, 2011
    Publication date: April 19, 2012
    Applicant: SUMITOMO METAL INDUSTRIES, LTD.
    Inventors: Takashi HIBINO, Takashi Fujimoto, Shigeki Namekata, Keisuke Komatsu, Yoshiyuki Nakao, Makoto Takata, Makoto Sakamoto
  • Patent number: 8104349
    Abstract: A tracking device is provided with a non-contact type displacement gauge, a positioner which moves a flaw detecting sensor within a plane perpendicular to an axial direction of a pipe or tube, and a positioning controller which controls the positioner.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: January 31, 2012
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Hiroshi Kubota, Yoshiyuki Nakao, Masami Ikeda, Nobuyuki Mori, Hiroshi Sato
  • Patent number: 8071474
    Abstract: (a1) A concave portion is formed in an interlayer insulating film formed on a semiconductor substrate. (a2) A first film of Mn is formed by CVD, the first film covering the inner surface of the concave portion and the upper surface of the insulating film. (a3) Conductive material essentially consisting of Cu is deposited on the first film to embed the conductive material in the concave portion. (a4) The semiconductor substrate is annealed. During the period until a barrier layer is formed having also a function of improving tight adhesion, it is possible to ensure sufficient tight adhesion of wiring members and prevent peel-off of the wiring members.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: December 6, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Noriyoshi Shimizu, Nobuyuki Ohtsuka, Hideki Kitada, Yoshiyuki Nakao
  • Patent number: 8067836
    Abstract: A semiconductor device includes an insulating film including oxygen formed over a semiconductor substrate, a recess formed in the insulating film, a refractory metal film formed on the inner wall of the recess, a metal film including copper, manganese, and nitrogen formed on the refractory metal film, and a copper film formed on the metal film to fill in the recess.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: November 29, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Masaki Haneda, Noriyoshi Shimizu, Nobuyuki Ohtsuka, Yoshiyuki Nakao, Michie Sunayama, Takahiro Tabira
  • Patent number: 8067309
    Abstract: A first insulating film is formed on a semiconductor substrate. A second insulating film made of insulating metal nitride is formed on the first insulating film. A recess is formed through the second insulating film and reaches a position deeper than an upper surface of the first insulating film. A conductive member is buried in the recess. A semiconductor device is provided whose interlayer insulating film can be worked easily even if it is made to have a low dielectric constant.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: November 29, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Noriyoshi Shimizu, Yoshiyuki Nakao, Hiroki Kondo, Takashi Suzuki, Nobuyuki Nishikawa
  • Patent number: 8027796
    Abstract: A method in accordance with the present invention includes the steps of: separating an eddy current signal into an X-axis component and a Y-axis component to obtain signal waveform data of the respective components; excluding predetermined low-frequency components respectively from the respective signal waveform data thus obtained; calculating a noise voltage value V1 defined by the following Equation (1) based upon voltage values X(i) and Y(i) of the signal waveform data of the X-axis component and the Y-axis component from which the low-frequency components have been excluded; and calculating an S/N ratio by dividing a voltage value D of an eddy current signal corresponding to a predetermined artificial flaw by the noise voltage value V1: V ? ? 1 = ? / n · ? i = 1 n ? ( X ? ( i ) 2 + Y ? ( i ) 2 ) 1 / 2 ( 1 ) where n represents the number of samplings of the signal waveform data.
    Type: Grant
    Filed: October 27, 2006
    Date of Patent: September 27, 2011
    Assignee: Sumitomo Metal Industries, Ltd.
    Inventors: Shoji Kinomura, Yoshiyuki Nakao, Toshiya Kodai, Shugo Nishiyama
  • Patent number: 7935624
    Abstract: A method for fabricating a semiconductor device includes the steps of forming an opening defined by an inner wall surface in an insulation film, forming a Cu—Mn alloy layer in the opening, depositing a Cu layer on the Cu—Mn alloy layer and filling the opening with the Cu layer, and forming a barrier layer as a result of reaction between Mn atoms in the Cu—Mn alloy layer and the insulation film, wherein the step of forming the barrier layer is conducted by exposing the Cu layer to an ambient that forms a gaseous reaction product when reacted with Mn.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: May 3, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Nobuyuki Ohtsuka, Noriyoshi Shimizu, Yoshiyuki Nakao, Hisaya Sakai
  • Publication number: 20110003475
    Abstract: A method for producing a semiconductor device including a first conductor disposed on a semiconductor substrate; an oxygen-containing insulation film disposed on the semiconductor substrate and on the first conductor, the insulation film having a contact hole which extends to the first conductor and a trench which is connected to an upper portion of the contact hole; a zirconium oxide film disposed on a side surface of the contact hole and a side surface and a bottom surface of the trench; a zirconium film disposed on the zirconium oxide film inside the contact hole and inside the trench; and a second conductor composed of Cu embedded into the contact hole and into the trench.
    Type: Application
    Filed: September 16, 2010
    Publication date: January 6, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Michie Sunayama, Yoshiyuki Nakao, Noriyoshi Shimizu
  • Publication number: 20100323519
    Abstract: (a1) A concave portion is formed in an interlayer insulating film formed on a semiconductor substrate. (a2) A first film of Mn is formed by CVD, the first film covering the inner surface of the concave portion and the upper surface of the insulating film. (a3) Conductive material essentially consisting of Cu is deposited on the first film to embed the conductive material in the concave portion. (a4) The semiconductor substrate is annealed. During the period until a barrier layer is formed having also a function of improving tight adhesion, it is possible to ensure sufficient tight adhesion of wiring members and prevent peel-off of the wiring members.
    Type: Application
    Filed: August 10, 2010
    Publication date: December 23, 2010
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Noriyoshi Shimizu, Nobuyuki Ohtsuka, Hideki Kitada, Yoshiyuki Nakao
  • Patent number: 7846833
    Abstract: An interlayer insulating film having a concave portion is formed on a semiconductor substrate. A tight adhesion film is formed on the inner surface of the concave portion and the upper surface of the insulating film. The surface of the adhesion layer is covered with an auxiliary film made of Cu alloy containing a first metal element. A conductive member containing a second metal element other than the first metal element is embedded in the concave portion, and deposited on the auxiliary film. Heat treatment is performed to make atoms of the first metal element in the auxiliary film segregate on the inner surface of the concave portion. The adhesion layer contains an element for enhancing tight adhesion of the auxiliary film more than if the auxiliary film is deposited directly on a surface of the interlayer insulating film.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: December 7, 2010
    Assignee: Fujitsu Limited
    Inventors: Hideki Kitada, Nobuyuki Ohtsuka, Noriyoshi Shimizu, Yoshiyuki Nakao
  • Patent number: 7816279
    Abstract: A semiconductor device includes a first conductor disposed on a semiconductor substrate; an oxygen-containing insulation film disposed on the semiconductor substrate and on the first conductor, the insulation film having a contact hole which extends to the first conductor and a trench which is connected to an upper portion of the contact hole; a zirconium oxide film disposed on a side surface of the contact hole and a side surface and a bottom surface of the trench; a zirconium film disposed on the zirconium oxide film inside the contact hole and inside the trench; and a second conductor composed of Cu embedded into the contact hole and into the trench.
    Type: Grant
    Filed: February 11, 2009
    Date of Patent: October 19, 2010
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Michie Sunayama, Yoshiyuki Nakao, Noriyoshi Shimizu
  • Publication number: 20100178762
    Abstract: An interlayer insulating film having a concave portion is formed on a semiconductor substrate. A tight adhesion film is formed on the inner surface of the concave portion and the upper surface of the insulating film. The surface of the adhesion layer is covered with an auxiliary film made of Cu alloy containing a first metal element. A conductive member containing a second metal element other than the first metal element is embedded in the concave portion, and deposited on the auxiliary film. Heat treatment is performed to make atoms of the first metal element in the auxiliary film segregate on the inner surface of the concave portion. The adhesion layer contains an element for enhancing tight adhesion of the auxiliary film more than if the auxiliary film is deposited directly on a surface of the interlayer insulating film.
    Type: Application
    Filed: March 25, 2010
    Publication date: July 15, 2010
    Applicant: FUJITSU LIMITED
    Inventors: Hideki Kitada, Nobuyuki Ohtsuka, Noriyoshi Shimizu, Yoshiyuki Nakao
  • Publication number: 20100148767
    Abstract: It is an object of the present invention to provide an eddy current testing apparatus capable of accurately detecting any flaws occurring in a columnar or cylindrical subject to be tested regardless of their extending directions, with the use of the same probe coil. The eddy current testing apparatus 100 according to the present invention comprises a spinning plate 1 and a probe coil 2 disposed on the spinning plate 1. The probe coil is a probe coil capable of obtaining a differential output about a scanning direction of a detection signal which corresponds to a detected eddy current induced in the subject to be tested. The spinning plate is disposed in such a position that a spinning center RC of the spinning plate faces with an axial center PC of the subject to be tested.
    Type: Application
    Filed: March 17, 2008
    Publication date: June 17, 2010
    Applicant: SUMITOMO METAL INDUSTRIES, LTD.
    Inventors: Shigetoshi Hyodo, Yoshiyuki Nakao
  • Publication number: 20100126278
    Abstract: A tracking device is provided with a non-contact type displacement gauge, a positioner which moves a flaw detecting sensor within a plane perpendicular to an axial direction of a pipe or tube, and a positioning controller which controls the positioner.
    Type: Application
    Filed: October 26, 2007
    Publication date: May 27, 2010
    Inventors: Hiroshi Kubota, Yoshiyuki Nakao, Masami Ikeda, Nobuyuki Mori, Hiroshi Sato
  • Patent number: 7713869
    Abstract: An interlayer insulating film having a concave portion is formed on a semiconductor substrate. A tight adhesion film is formed on the inner surface of the concave portion and the upper surface of the insulating film. The surface of the adhesion layer is covered with an auxiliary film made of Cu alloy containing a first metal element. A conductive member containing a second metal element other than the first metal element is embedded in the concave portion, and deposited on the auxiliary film. Heat treatment is performed to make atoms of the first metal element in the auxiliary film segregate on the inner surface of the concave portion. The adhesion layer contains an element for enhancing tight adhesion of the auxiliary film more than if the auxiliary film is deposited directly on a surface of the interlayer insulating film.
    Type: Grant
    Filed: November 30, 2005
    Date of Patent: May 11, 2010
    Assignee: Fujitsu Limited
    Inventors: Hideki Kitada, Nobuyuki Ohtsuka, Noriyoshi Shimizu, Yoshiyuki Nakao
  • Publication number: 20090321937
    Abstract: A semiconductor device includes an insulating film including oxygen formed over a semiconductor substrate, a recess formed in the insulating film, a refractory metal film formed on the inner wall of the recess, a metal film including copper, manganese, and nitrogen formed on the refractory metal film, and a copper film formed on the metal film to fill in the recess.
    Type: Application
    Filed: April 29, 2009
    Publication date: December 31, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Masaki HANEDA, Noriyoshi SHIMIZU, Nobuyuki OHTSUKA, Yoshiyuki NAKAO, Michie SUNAYAMA, Takahiro TABIRA
  • Publication number: 20090200670
    Abstract: A semiconductor device includes a first conductor disposed on a semiconductor substrate; an oxygen-containing insulation film disposed on the semiconductor substrate and on the first conductor, the insulation film having a contact hole which extends to the first conductor and a trench which is connected to an upper portion of the contact hole; a zirconium oxide film disposed on a side surface of the contact hole and a side surface and a bottom surface of the trench; a zirconium film disposed on the zirconium oxide film inside the contact hole and inside the trench; and a second conductor composed of Cu embedded into the contact hole and into the trench.
    Type: Application
    Filed: February 11, 2009
    Publication date: August 13, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Michie SUNAYAMA, Yoshiyuki NAKAO, Noriyoshi SHIMIZU
  • Publication number: 20090138222
    Abstract: A method in accordance with the present invention includes the steps of: separating an eddy current signal into an X-axis component and a Y-axis component to obtain signal waveform data of the respective components; excluding predetermined low-frequency components respectively from the respective signal waveform data thus obtained; calculating a noise voltage value V1 defined by the following Equation (1) based upon voltage values X(i) and Y(i) of the signal waveform data of the X-axis component and the Y-axis component from which the low-frequency components have been excluded; and calculating an S/N ratio by dividing a voltage value D of an eddy current signal corresponding to a predetermined artificial flaw by the noise voltage value V1: V ? ? 1 = ? / n · ? i = 1 n ? ( X ? ( i ) 2 + Y ? ( i ) 2 ) 1 / 2 ( 1 ) where n represents the number of samplings of the signal waveform data.
    Type: Application
    Filed: October 27, 2006
    Publication date: May 28, 2009
    Inventors: Shoji Kinomura, Yoshiyuki Nakao, Toshiya Kodai, Shugo Nishiyama
  • Publication number: 20090121355
    Abstract: A semiconductor device includes a semiconductor substrate, an oxygen-containing insulating film disposed above the above-described semiconductor substrate, a concave portion disposed in the above-described insulating film, a copper-containing first film disposed on an inner wall of the above-described concave portion, a copper-containing second film disposed above the above-described first film and filled in the above-described concave portion, and a manganese-containing oxide layer disposed between the above-described first film and the above-described second film. Furthermore, a copper interconnection is formed on the above-described structure by an electroplating method and, subsequently, a short-time heat treatment is conducted at a temperature of 80° C. to 120° C.
    Type: Application
    Filed: November 10, 2008
    Publication date: May 14, 2009
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventors: Masaki HANEDA, Michie SUNAYAMA, Noriyoshi SHIMIZU, Nobuyuki OHTSUKA, Yoshiyuki NAKAO, Takahiro TABIRA
  • Patent number: 7507659
    Abstract: A method for fabricating a semiconductor device has forming an opening defined by an inner wall surface in an insulation film, covering said inner wall surface with a Cu—Mn alloy layer, depositing a first Cu layer over said Cu—Mn alloy layer without exposing said Cu—Mn alloy layer to the air, depositing a second Cu layer over said first Cu layer and filling said opening with said second Cu layer, and forming a barrier layer over said inner wall surface as a result of a reaction between Mn in said Cu—Mn alloy layer and said insulation film.
    Type: Grant
    Filed: November 13, 2007
    Date of Patent: March 24, 2009
    Assignee: Fujitsu Microelectronics Limited
    Inventors: Nobuyuki Ohtsuka, Noriyoshi Shimizu, Yoshiyuki Nakao